EPM5192AJI84-15 vs EPM5192ALC84-15 Comparison
Detailed side-by-side comparison of EPM5192AJI84-15 by Altera and EPM5192ALC84-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5192AJI84-15 | EPM5192ALC84-15 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $27.80 | $13.20 |
| Device Family | MAX 5000 EPLD | MAX 5000 (EPM5192) |
| Product Type | UV-Erasable / OTP Complex PLD | β |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 16 | β |
| User I/O Pins | 84 | 64 |
| Propagation Delay (tPD) | 15 ns | 15 ns |
| Supply Voltage (VCC) | 4.5 V to 5.5 V (nominal 5 V) | 4.75 V to 5.25 V (nominal 5 V) |
| Process Technology | CMOS EPROM (UV-erasable) | CMOS (EPROM-based) |
| Package Type | 84-pin JLCC (J-Leaded Ceramic Chip Carrier) with quartz window | β |
| Mounting Type | Through-Hole (SMD socket-compatible) | β |
| Operating Temperature | -40 Β°C to +85 Β°C (Industrial, 'I' suffix) | β |
| Programming Method | UV erase + EPROM program via standard Altera programmer | β |
| Design Tool Support | MAX+PLUS II (legacy); not supported by modern Quartus Prime | β |
| RoHS Status | unknown | β |
| Lead-Free | unknown | β |
| Halogen-Free | unknown | β |
| Functional Equivalent (Plastic OTP) | EPM5192AJC84-15 (windowless plastic JLCC, same die) | β |
| Device Type | β | CPLD / UV-Erasable / OTP Complex PLD |
| Dedicated Inputs | β | 7 |
| Propagation Delay (Industry Variant) | β | 25 ns (per MicrochipUSA listing) |
| Programmability | β | UV-erasable window / OTP |
| Package | β | 84-pin PLCC (QCCJ, J-bend ceramic) |
| Operating Temperature Grade | β | Commercial |
| Terminal Form | β | J-BEND |
| Package Code | β | QCCJ |
| Package Shape | β | SQUARE |
| Architecture | β | Programmable Logic Array + Macrocell Registers + PIA interconnect |