EPM5192AJI84-15 vs EPM5192ALC84-15 比較
詳細並排比較 EPM5192AJI84-15 由 Altera 與 EPM5192ALC84-15 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM5192AJI84-15 | EPM5192ALC84-15 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Device Family | MAX 5000 EPLD | MAX 5000 (EPM5192) |
| Product Type | UV-Erasable / OTP Complex PLD | — |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 16 | — |
| User I/O Pins | 84 | 64 |
| Propagation Delay (tPD) | 15 ns | 15 ns |
| Supply Voltage (VCC) | 4.5 V to 5.5 V (nominal 5 V) | 4.75 V to 5.25 V (nominal 5 V) |
| Process Technology | CMOS EPROM (UV-erasable) | CMOS (EPROM-based) |
| Package Type | 84-pin JLCC (J-Leaded Ceramic Chip Carrier) with quartz window | — |
| 安裝類型 | Through-Hole (SMD socket-compatible) | — |
| 工作溫度 | -40 °C to +85 °C (Industrial, 'I' suffix) | — |
| Programming Method | UV erase + EPROM program via standard Altera programmer | — |
| Design Tool Support | MAX+PLUS II (legacy); not supported by modern Quartus Prime | — |
| RoHS 狀態 | unknown | — |
| Lead-Free | unknown | — |
| 無鹵素 | unknown | — |
| Functional Equivalent (Plastic OTP) | EPM5192AJC84-15 (windowless plastic JLCC, same die) | — |
| Device Type | — | CPLD / UV-Erasable / OTP Complex PLD |
| Dedicated Inputs | — | 7 |
| Propagation Delay (Industry Variant) | — | 25 ns (per MicrochipUSA listing) |
| Programmability | — | UV-erasable window / OTP |
| 封裝 | — | 84-pin PLCC (QCCJ, J-bend ceramic) |
| Operating Temperature Grade | — | Commercial |
| Terminal Form | — | J-BEND |
| Package Code | — | QCCJ |
| Package Shape | — | SQUARE |
| Architecture | — | Programmable Logic Array + Macrocell Registers + PIA interconnect |