EPM5192ALC84-20 vs EPM5192ALC84-15 Comparison
Detailed side-by-side comparison of EPM5192ALC84-20 by Altera and EPM5192ALC84-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM5192ALC84-20 | EPM5192ALC84-15 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Device Type | UV-Erasable/OTP Complex PLD (EPLD) | CPLD / UV-Erasable / OTP Complex PLD |
| Series | Altera MAX 5000 | — |
| Macrocells | 192 | 192 |
| Process Technology | CMOS | CMOS (EPROM-based) |
| Speed Grade | -20 (20 ns pin-to-pin delay) | — |
| Package | 84-pin PLCC (Plastic Leaded Chip Carrier) | 84-pin PLCC (QCCJ, J-bend ceramic) |
| Terminal Pitch | 1.270 mm | — |
| Terminal Form | J-bend | J-BEND |
| Package Code | QCCJ (PLCC-84) | QCCJ |
| Package Shape | Square | SQUARE |
| Temperature Grade | Commercial | — |
| Programming Method | UV-erase + EPROM (One-Time-Programmable option) | — |
| Logic Family | MAX 5000 EPLD | — |
| I/O Compatibility | TTL-compatible | — |
| Mounting Type | Surface Mount (PLCC socket-compatible) | — |
| Configuration Memory | EPROM (UV-erasable) | — |
| RoHS Status | [DATA_NEEDED: RoHS status not in provided web data] | — |
| Device Family | — | MAX 5000 (EPM5192) |
| Dedicated Inputs | — | 7 |
| User I/O Pins | — | 64 |
| Propagation Delay (tPD) | — | 15 ns |
| Propagation Delay (Industry Variant) | — | 25 ns (per MicrochipUSA listing) |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V (nominal 5 V) |
| Programmability | — | UV-erasable window / OTP |
| Operating Temperature Grade | — | Commercial |
| Architecture | — | Programmable Logic Array + Macrocell Registers + PIA interconnect |