EPM5192ALC84-20 vs EPM5192ALC84-15 比較
詳細並排比較 EPM5192ALC84-20 由 Altera 與 EPM5192ALC84-15 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM5192ALC84-20 | EPM5192ALC84-15 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Device Type | UV-Erasable/OTP Complex PLD (EPLD) | CPLD / UV-Erasable / OTP Complex PLD |
| Series | Altera MAX 5000 | — |
| Macrocells | 192 | 192 |
| Process Technology | CMOS | CMOS (EPROM-based) |
| Speed Grade | -20 (20 ns pin-to-pin delay) | — |
| 封裝 | 84-pin PLCC (Plastic Leaded Chip Carrier) | 84-pin PLCC (QCCJ, J-bend ceramic) |
| Terminal Pitch | 1.270 mm | — |
| Terminal Form | J-bend | J-BEND |
| Package Code | QCCJ (PLCC-84) | QCCJ |
| Package Shape | Square | SQUARE |
| Temperature Grade | Commercial | — |
| Programming Method | UV-erase + EPROM (One-Time-Programmable option) | — |
| Logic Family | MAX 5000 EPLD | — |
| I/O Compatibility | TTL-compatible | — |
| 安裝類型 | Surface Mount (PLCC socket-compatible) | — |
| Configuration Memory | EPROM (UV-erasable) | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status not in provided web data] | — |
| Device Family | — | MAX 5000 (EPM5192) |
| Dedicated Inputs | — | 7 |
| User I/O Pins | — | 64 |
| Propagation Delay (tPD) | — | 15 ns |
| Propagation Delay (Industry Variant) | — | 25 ns (per MicrochipUSA listing) |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V (nominal 5 V) |
| Programmability | — | UV-erasable window / OTP |
| Operating Temperature Grade | — | Commercial |
| Architecture | — | Programmable Logic Array + Macrocell Registers + PIA interconnect |