EPM5192GM-1 vs EPM5192GM Comparison

Detailed side-by-side comparison of EPM5192GM-1 by Altera and EPM5192GM by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5192GM-1 EPM5192GM
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $27.80 $58.00
Family MAX 5000 β€”
Logic Cells 192 β€”
Propagation Delay (tpd) 55 ns β€”
Process Technology CMOS β€”
Programmable Element UV-erasable EPROM β€”
Package CPGA-84 (Windowed Ceramic PGA) CPGA-84 (Ceramic Pin Grid Array, 84 pins, windowed)
Pin Count 84 β€”
Supply Voltage [DATA_NEEDED: VCC nominal] [DATA_NEEDED: typical VCC range]
Operating Temperature Range [DATA_NEEDED: commercial/industrial/military grade] β€”
Programmable Macrocells 192 β€”
User I/O Pins [DATA_NEEDED: user I/O count] β€”
Mounting Type Through-Hole (Pin Grid Array socket) Through-Hole (PGA)
RoHS Compliance unknown (legacy ceramic PGA) β€”
Lead-Free Status unknown β€”
Programming Interface Altera ByteBlaster / JEDEC bitstream JTAG-compatible (per MAX 5000 family)
Development Tool Altera MAX+PLUS II (legacy) β€”
Product Family β€” MAX 5000
Device Type β€” UV Erasable Programmable Logic Device (PLD)
Technology β€” CMOS
Number of Macrocells β€” 192
Usable Gates β€” 3,750
Pin-to-Pin Delay (tPD) β€” 15 ns (fastest speed grade); 55 ns (this part)
Counter Frequency (fCNT) β€” up to 76.9 MHz
Propagation Delay (tPD, this part) β€” 55 ns
Erasure Method β€” UV (windowed ceramic package)
Maximum User I/O β€” [DATA_NEEDED: exact I/O count for CPGA-84]
Operating Temperature β€” [DATA_NEEDED: commercial/industrial/military grade]
RoHS Status β€” Non-compliant (contains lead in ceramic PGA)
Process Node β€” [DATA_NEEDED: CMOS process geometry]

Datasheets & Resources

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