EPM5192GM-1 vs EPM5192GM Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192GM-1 sa pamamagitan ng Altera at EPM5192GM sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPM5192GM-1 EPM5192GM
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Family MAX 5000 —
Logic Cells 192 —
Propagation Delay (tpd) 55 ns —
Process Technology CMOS —
Programmable Element UV-erasable EPROM —
Packhaging CPGA-84 (Windowed Ceramic PGA) CPGA-84 (Ceramic Pin Grid Array, 84 pins, windowed)
Bilang ng Pin 84 —
Volte ng Pagbibigay [DATA_NEEDED: VCC nominal] [DATA_NEEDED: typical VCC range]
Hanay ng Temperature na Operasyon [DATA_NEEDED: commercial/industrial/military grade] —
Programmable Macrocells 192 —
User I/O Pins [DATA_NEEDED: user I/O count] —
Uri ng Pagpapasok Through-Hole (Pin Grid Array socket) Through-Hole (PGA)
RoHS Compliance unknown (legacy ceramic PGA) —
Lead-Free Status unknown —
Programming Interface Altera ByteBlaster / JEDEC bitstream JTAG-compatible (per MAX 5000 family)
Development Tool Altera MAX+PLUS II (legacy) —
Product Family — MAX 5000
Device Type — UV Erasable Programmable Logic Device (PLD)
Technology — CMOS
Number of Macrocells — 192
Usable Gates — 3,750
Pin-to-Pin Delay (tPD) — 15 ns (fastest speed grade); 55 ns (this part)
Counter Frequency (fCNT) — up to 76.9 MHz
Propagation Delay (tPD, this part) — 55 ns
Erasure Method — UV (windowed ceramic package)
Maximum User I/O — [DATA_NEEDED: exact I/O count for CPGA-84]
Temperature na Operasyon — [DATA_NEEDED: commercial/industrial/military grade]
Tindminan RoHS — Non-compliant (contains lead in ceramic PGA)
Process Node — [DATA_NEEDED: CMOS process geometry]

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