EPM7096LC84-7 vs EPM7096LC84-15 Comparison
Detailed side-by-side comparison of EPM7096LC84-7 by Intel and EPM7096LC84-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM7096LC84-7 | EPM7096LC84-15 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | MAX 7000 | MAX 7000 |
| Macrocells | 96 | — |
| Logic Array Blocks (LABs) | 4 | 4 |
| User I/O Pins | 64 | 68 (36 per LAB, [DATA_NEEDED: exact LAB-level split]) |
| Speed Grade (tPD) | 7.5 ns | — |
| Package | 84-pin PLCC (Plastic Leaded Chip Carrier) | — |
| Mounting Type | Surface Mount | Surface Mount |
| Supply Voltage | 5.0 V | — |
| Programming Technology | EEPROM (non-volatile) | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | — |
| Architecture | Second-generation MAX | — |
| I/O Logic Levels | 5.0 V TTL/CMOS-compatible | — |
| Operating Temperature | 0C to +70C (commercial, LC suffix) | 0C to +70C (commercial) |
| RoHS Status | Non-compliant (original Altera product, leaded PLCC package) | [DATA_NEEDED: RoHS compliance status] |
| Lifecycle Status | Obsolete - PCN/PDN issued by Intel | — |
| Series | — | MAX 7000 (second-generation MAX architecture) |
| Macro Cells | — | 96 |
| Usable Gates | — | 1,800 |
| Pin-to-Pin Propagation Delay (tPD) | — | 15 ns |
| Maximum Operating Frequency | — | 76.9 MHz |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V |
| Programmable Type | — | EE PLD (in-system programmable via JTAG) |
| Programming Interface | — | IEEE Std. 1149.1 JTAG |
| Package / Case | — | 84-PLCC (J-Lead) |
| Supplier Device Package | — | 84-PLCC (29.31 x 29.31 mm) |
| Data Retention | — | [DATA_NEEDED: data retention years] |
| Erase/Program Endurance | — | [DATA_NEEDED: erase/program cycle count] |