EPM7128SQC160-15N vs EPM7128SQC100-15 Comparison
Detailed side-by-side comparison of EPM7128SQC160-15N by Intel and EPM7128SQC100-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM7128SQC100-15 - MAX 7000 CPLD 128MC 15ns 5V | Altera/Intel
EPM7128SQC100-15 ⚠ Last Time BuySpecification Comparison
| Parameter | EPM7128SQC160-15N | EPM7128SQC100-15 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | NRND | Last Time Buy |
| Unit Price (USD) | — | $8.20 |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Family | MAX 7000 | MAX 7000 |
| Macro Cells | 128 | — |
| Logic Array Blocks (LABs) | 8 | 4 (16 macrocells each) |
| User I/O Count | 100 | — |
| Usable Gates | 2.5K | — |
| Propagation Delay (tPD) | 15 ns | — |
| Maximum Internal Frequency | 76.9 MHz | — |
| Supply Voltage (VCCINT) | 5 V | 5 V (5% tolerance) |
| I/O Voltage Tolerance | 3.3 V / 5 V mixed | — |
| Programming Technology | EEPROM (non-volatile) | EEPROM (in-system programmable via JTAG) |
| In-System Programmability | Yes (JTAG-compatible) | — |
| Package | 160-pin PQFP / BQFP (Plastic Quad Flat Pack) | 100-pin PQFP (Plastic Quad Flat Pack) |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | 0°C to +70°C (commercial) | 0C to +70C (Commercial) |
| RoHS Status | [DATA_NEEDED: RoHS status] | Non-compliant (SnPb lead finish - legacy PQFP) |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 128 |
| User I/Os | — | 84 |
| Pin-to-Pin Delay (tPD) | — | 15 ns |
| Maximum Frequency (fMAX) | — | [DATA_NEEDED: fMAX value] |
| Typical Gate Count | — | 2,500 gates |
| JTAG Interface | — | IEEE Std. 1149.1 compliant |
| MSL Level | — | 3 (168 hours) |