EPM7160STC100-10N vs EPM7160STC100-10 Comparison

Detailed side-by-side comparison of EPM7160STC100-10N by Altera and EPM7160STC100-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM7160STC100-10N EPM7160STC100-10
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Last Time Buy
Family MAX 7000S MAX 7000S
Macrocells 160 —
User I/Os 84 84
Equivalent Gates 3.2K —
Propagation Delay (tPD) 10 ns —
Internal Operating Frequency 167 MHz max —
Supply Voltage (VCCINT) 4.75 V to 5.25 V —
I/O Voltage (VCCIO) 3.0 V to 5.25 V (MultiVolt) —
Logic Family CMOS —
Programmable Type In-System Programmable (ISP) via JTAG —
Configuration Memory EEPROM (non-volatile) —
Package TQFP-100 (1 mm height, plastic) 100-pin TQFP
Operating Temperature 0C to +70C (Commercial) 0 C to +70 C (commercial)
Mounting Type Surface Mount Surface Mount
JTAG (IEEE 1149.1) Yes —
PCI Compliance Yes (66 MHz) —
RoHS Status [DATA_NEEDED: RoHS status] Non-RoHS (legacy Altera part; -10N variant is RoHS)
MSL Level [DATA_NEEDED: MSL level] —
Device Type — CPLD (Complex Programmable Logic Device)
Macro Cells — 160
Usable Gates — 3,200
Logic Elements — 160 macrocells / 10 Logic Array Blocks
Supply Voltage (VCC) — 5.0 V (4.75 V - 5.25 V)
Propagation Delay (tPD1) — 10 ns
Global Clock Setup Time — 6 ns
Internal Counter Frequency — 100 MHz
Technology — CMOS, EEPROM-based
In-System Programmability — Yes (IEEE 1149.1 JTAG)

Datasheets & Resources

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