EPM7256ATI144-10 vs EPM7256AQC208-7 Comparison
Detailed side-by-side comparison of EPM7256ATI144-10 by Altera and EPM7256AQC208-7 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM7256ATI144-10 | EPM7256AQC208-7 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $10.95 | $27.20 |
| Family | MAX 7000A | MAX 7000A |
| Macrocells | 256 | 256 |
| Logic Array Blocks (LABs) | 16 | 16 |
| Maximum Usable Gates | 5,000 | β |
| Pin-to-Pin Delay (tPD) | 10 ns | β |
| Maximum Frequency (fCNT) | 93.5 MHz | β |
| User I/O Pins | 100 | β |
| Supply Voltage (VCCINT) | 3.3 V | β |
| I/O Voltage (VCCIO) | 2.5 V or 3.3 V | β |
| Program Memory Type | EEPROM (non-volatile) | β |
| In-System Programming | Yes (IEEE 1149.1 JTAG) | β |
| Package | 144-pin TQFP | 208-Pin PQFP (28 x 28 mm) |
| Operating Temperature Range | -40C to +85C (Industrial) | 0C to +70C (commercial) |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | Non-compliant (legacy Altera marking) | [DATA_NEEDED: RoHS status] |
| Process Technology | EEPROM-based CMOS | β |
| Programmable Type | β | In System Programmable (ISP), EEPROM-based |
| Usable Gates | β | 5,000 |
| Maximum User I/O Pins | β | 164 |
| Pin-to-Pin Logic Delay (tPD) | β | 7 ns |
| Maximum Counter Frequency | β | 125 MHz |
| Internal Toggle Frequency | β | 227.3 MHz |
| Supply Voltage - Internal | β | 3.0 V to 3.6 V |
| I/O Voltage Compatibility | β | 5.0 V, 3.3 V, 2.5 V (MultiVolt I/O) |
| Supplier Device Package | β | 208-PQFP (28x28) |
| JTAG Interface | β | IEEE 1149.1 (JTAG) boundary scan |
| Configuration Memory | β | EEPROM (non-volatile) |
| Speed Grade | β | -7 |
| MSL Level | β | [DATA_NEEDED: MSL level] |