EPM9320ALI84-10N vs EPM9320ALC84-10 Comparison

Detailed side-by-side comparison of EPM9320ALI84-10N by Altera and EPM9320ALC84-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM9320ALI84-10N EPM9320ALC84-10
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $21.95 $19.80
Family MAX 9000 MAX 9000
Device Type CPLD (Complex Programmable Logic Device) β€”
Architecture MAX (Multiple Array MatriX), 3rd generation MAX (Multiple Array MatriX) with FastTrack Interconnect
Process Technology CMOS EEPROM β€”
Usable Gates 6,000 to 12,000 β€”
Macrocells 320 320
Logic Array Blocks (LABs) 20 16
User I/O Pins 56 β€”
Pin-to-Pin Delay 10 ns β€”
Maximum Counter Frequency 144.9 MHz β€”
VCCINT (Core Supply) 5.0 V β€”
VCCIO (I/O Supply) 3.3 V or 5.0 V β€”
Input Logic Levels TTL-compatible (at 5.0 V VCCINT) β€”
In-System Programmability Yes (IEEE Std. 1149.1 JTAG) 5.0 V ISP via IEEE 1149.1 JTAG
Package 84-pin PLCC (J-lead, 1.270 mm pitch) 84-pin PLCC (J-Lead)
Mounting Type Surface Mount (PLCC socket compatible) Surface Mount / Through-Hole (PLCC socket)
Operating Temperature -40C to +85C (industrial) [DATA_NEEDED: commercial/industrial grade]
Configuration Memory EEPROM, non-volatile β€”
Device β€” EPM9320
Maximum User I/O Pins β€” 52
Dedicated Inputs β€” 16
Speed Grade β€” -10 (10 ns pin-to-pin delay)
Pin-to-Pin Delay (tPD) β€” 10 ns
Supply Voltage (VCCINT) β€” 5.0 V
Technology β€” CMOS EEPROM-based, third-generation MAX
PCI Compliance β€” PCI Local Bus Specification Rev. 2.2 (speed grade -10)
RoHS Status β€” [DATA_NEEDED]
Non-Volatile Configuration β€” Yes (EEPROM cell, powers up in known state)

Datasheets & Resources

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