EPM9320BC356-15 vs EPM9320ALI84-10N Comparison

Detailed side-by-side comparison of EPM9320BC356-15 by Altera and EPM9320ALI84-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM9320BC356-15

EPM9320BC356-15 - MAX 9000 CPLD, 320 Macro, 15ns, BGA-356 | Altera

EPM9320BC356-15 Nrnd
Altera
EPM9320ALI84-10N

EPM9320ALI84-10N - 320-Macrocell 10ns MAX 9000 CPLD | Altera

EPM9320ALI84-10N Obsolete

Specification Comparison

Parameter EPM9320BC356-15 EPM9320ALI84-10N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $31.20 $21.95
Family MAX 9000 MAX 9000
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Architecture Multiple Array MatriX (MAX) - third generation MAX (Multiple Array MatriX), 3rd generation
Macrocells 320 320
Pin-to-Pin Delay (max) 15 ns β€”
Process Technology CMOS EEPROM CMOS EEPROM
Supply Voltage (VCC) 4.75 V to 5.25 V (5.0 V typical) β€”
In-System Programmability Yes (5.0-V ISP via JTAG) Yes (IEEE Std. 1149.1 JTAG)
JTAG Interface IEEE Std. 1149.1 compliant β€”
Package 356-ball LBGA (BGA-356, 35x35 mm) 84-pin PLCC (J-lead, 1.270 mm pitch)
Mounting Type Surface Mount Surface Mount (PLCC socket compatible)
Programmable Type In System Programmable β€”
Operating Temperature Grade Commercial β€”
RoHS Status [DATA_NEEDED: RoHS compliance status] β€”
Lead-Free [DATA_NEEDED: lead-free status] β€”
Usable Gates β€” 6,000 to 12,000
Logic Array Blocks (LABs) β€” 20
User I/O Pins β€” 56
Pin-to-Pin Delay β€” 10 ns
Maximum Counter Frequency β€” 144.9 MHz
VCCINT (Core Supply) β€” 5.0 V
VCCIO (I/O Supply) β€” 3.3 V or 5.0 V
Input Logic Levels β€” TTL-compatible (at 5.0 V VCCINT)
Operating Temperature β€” -40C to +85C (industrial)
Configuration Memory β€” EEPROM, non-volatile

Datasheets & Resources

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