EPM9560RC208-7 vs EPM9560SRC208-7 Comparison

Detailed side-by-side comparison of EPM9560RC208-7 by Altera and EPM9560SRC208-7 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM9560RC208-7 EPM9560SRC208-7
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $18.90 $52.00
Family MAX 9000 MAX 9000
Device Type EPLD / CPLD EPLD (Erasable Programmable Logic Device)
Usable Gates 560 12,000
Macrocells 16 560
Logic Array Blocks (LABs) 4 16
User I/O Pins 208 β€”
Pin-to-Pin Delay (tPD) 7 ns (speed grade -7) β€”
Maximum Frequency (fMAX) [DATA_NEEDED: fMAX value] β€”
Supply Voltage (VCCINT) 5.0 V β€”
Supply Voltage (VCCIO) 5.0 V (TTL) or 3.3 V (LVCMOS with level translator) β€”
Process Technology 0.65 um CMOS EEPROM β€”
Configuration Memory Non-volatile on-chip EEPROM (no boot PROM required) β€”
Programming Interface JTAG (IEEE 1149.1) + Altera ISP β€”
Package 208-pin Power Quad Flat Pack (RQFP-208) 208-pin SQFP (Surface-mount Quad Flat Pack)
Operating Temperature 0C to +70C (commercial) / -40C to +85C (industrial) β€”
Output Drive Current 160 mA DC sink per pin β€”
RoHS Status Compliant (ROHS3 per distributor listing) [DATA_NEEDED: per part marking / distributor listing]
Maximum I/O Pins β€” 212
Pin-to-Pin Logic Delay (tPD) β€” 7.0 ns
Maximum Frequency (fCNT) β€” [DATA_NEEDED: fCNT for -7 speed grade]
Supply Voltage (VCC) β€” 5.0 V (single supply)
Programming Method β€” In-system via IEEE Std 1149.1 JTAG
Operating Temperature Range β€” -40 Β°C to +85 Β°C (industrial)
Technology β€” CMOS, EEPROM-based
Mounting Type β€” Surface Mount
MSL Level β€” [DATA_NEEDED: not stated in mature datasheet]

Datasheets & Resources

Browse All Products Create BOM Request Quote