EPM9560RC208-7 vs EPM9560SRC208-7 比較

詳細並排比較 EPM9560RC208-7 由 Altera 與 EPM9560SRC208-7 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPM9560RC208-7 EPM9560SRC208-7
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 NRND NRND
Family MAX 9000 MAX 9000
Device Type EPLD / CPLD EPLD (Erasable Programmable Logic Device)
Usable Gates 560 12,000
Macrocells 16 560
Logic Array Blocks (LABs) 4 16
User I/O Pins 208 —
Pin-to-Pin Delay (tPD) 7 ns (speed grade -7) —
Maximum Frequency (fMAX) [DATA_NEEDED: fMAX value] —
Supply Voltage (VCCINT) 5.0 V —
Supply Voltage (VCCIO) 5.0 V (TTL) or 3.3 V (LVCMOS with level translator) —
Process Technology 0.65 um CMOS EEPROM —
Configuration Memory Non-volatile on-chip EEPROM (no boot PROM required) —
Programming Interface JTAG (IEEE 1149.1) + Altera ISP —
封裝 208-pin Power Quad Flat Pack (RQFP-208) 208-pin SQFP (Surface-mount Quad Flat Pack)
工作溫度 0C to +70C (commercial) / -40C to +85C (industrial) —
Output Drive Current 160 mA DC sink per pin —
RoHS 狀態 Compliant (ROHS3 per distributor listing) [DATA_NEEDED: per part marking / distributor listing]
Maximum I/O Pins — 212
Pin-to-Pin Logic Delay (tPD) — 7.0 ns
Maximum Frequency (fCNT) — [DATA_NEEDED: fCNT for -7 speed grade]
Supply Voltage (VCC) — 5.0 V (single supply)
Programming Method — In-system via IEEE Std 1149.1 JTAG
工作溫度範圍 — -40 °C to +85 °C (industrial)
Technology — CMOS, EEPROM-based
安裝類型 — Surface Mount
MSL 等級 — [DATA_NEEDED: not stated in mature datasheet]

資料表與資源

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