EPM9560RC210-20 vs EPM9560RC208-20C Comparison

Detailed side-by-side comparison of EPM9560RC210-20 by Altera and EPM9560RC208-20C by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM9560RC210-20 EPM9560RC210-20 - MAX 9000 CPLD 560 Macrocells | Altera

EPM9560RC210-20 - MAX 9000 CPLD 560 Macrocells | Altera

EPM9560RC210-20 ⚠ Last Time Buy

Specification Comparison

Parameter EPM9560RC210-20 EPM9560RC208-20C
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last_time_buy Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $60.00 $0.00
Family MAX 9000 MAX 9000
Product Type CPLD (Complex Programmable Logic Device) β€”
Macrocells 560 560
Usable Gates 12,000 12,000
Logic Array Blocks (LABs) 16 β€”
Package RQFP-210 (Power Quad Flat Pack, 0.5mm pitch) 208-pin RQFP (Power Quad Flat Pack)
Pin-to-Pin Delay (tPD) 20 ns β€”
Clock-to-Output (tCO) 12 ns β€”
Maximum User I/O [DATA_NEEDED: 212 I/O per datasheet, package-dependent] β€”
Supply Voltage 5 V 5.0 V
Process Technology 0.65 um EEPROM β€”
In-System Programmability Yes (MAX+PLUS II flow) Yes, via IEEE Std. 1149.1 JTAG
Boundary-Scan (JTAG) IEEE Std 1149.1 compliant β€”
Operating Temperature [DATA_NEEDED: commercial 0C to 70C typical; industrial variants exist] β€”
Mounting Type Surface Mount Surface Mount
RoHS Status RoHS3 Compliant (per supplier listing) [DATA_NEEDED: RoHS status]
Device Type β€” EEPROM-based CPLD (EE PLD)
Flip-Flops β€” 772
Configurable I/O Lines β€” 149
Propagation Delay (tPD) β€” 20 ns (speed grade -20)
Maximum Frequency β€” 100 MHz
I/O Voltage Support β€” 3.3 V or 5 V
Configuration Memory β€” EEPROM (non-volatile)
JESD-30 Package Code β€” S-PQFP-G208
Terminal Form β€” Gull Wing
Operating Temperature Grade β€” Commercial (0C to +70C)
Technology β€” CMOS

Datasheets & Resources

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