EPM9560RC240-2 vs EPM9560RC240-10 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RC240-2 sa pamamagitan ng Altera at EPM9560RC240-10 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9560RC240-2 | EPM9560RC240-10 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Logic Elements | 560 macrocells | — |
| Usable Gates | 12,000 | 12,000 gates |
| Pin-to-Pin Delay | 2 ns (speed grade -2) | — |
| Maximum Frequency | 100 MHz | — |
| Volte ng Pagbibigay | 5 V | 5 V |
| User I/O Count | 212 | — |
| Packhaging | 240-pin RQFP (Metric QFP) | 240-pin RQFP (PowerQuad) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Programming Interface | JTAG (IEEE 1149.1), in-system programmable | — |
| Non-Volatile Configuration | Yes (EEPROM-based) | — |
| Temperature na Operasyon | [DATA_NEEDED: commercial/industrial grade] | 0C to +70C (commercial) |
| Tindminan RoHS | Non-compliant (5V RQFP, pre-RoHS era) | ROHS3 Compliant |
| Lead-Free | No (legacy Sn/Pb process) | — |
| Logic Block Count | [DATA_NEEDED: LAB count] | — |
| Device Type | — | Complex Programmable Logic Device (CPLD) |
| Macro Cells | — | 560 |
| Logic Array Blocks (LABs) | — | 12 |
| Maximum System Frequency | — | 144.9 MHz |
| Pin-to-Pin Propagation Delay | — | 10 ns |
| Technology | — | CMOS EEPROM |
| User I/O Pins | — | 192 |
| Level ng Sensitivity sa Asid ng Moisture (MSL) | — | 3 (168 Hours) |
| Configuration Memory | — | Non-volatile EEPROM (instant-on) |
| Manufacturer Standard Lead Time | — | 1-7 Days (distributor stock) |