1EDN7126GXTMA1 vs 2EDN7524GXTMA1 Vergleich
Detaillierter Direktvergleich von 1EDN7126GXTMA1 von Infineon und 2EDN7524GXTMA1 von Infineon. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Infineon
2EDN7524GXTMA1 - 5A Dual Low-Side Gate Driver for MOSFET/GaN | Infineon
2EDN7524GXTMA1 ✓ AktivSpezifikationsvergleich
| Parameter | 1EDN7126GXTMA1 | 2EDN7524GXTMA1 |
|---|---|---|
| Marke | Infineon | Infineon |
| Kategorie | Power MOSFET Drivers | Power MOSFET Drivers |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $0,29 | $0,82 |
| Funktion | Single-channel TDI gate driver for GaN HEMT and Si MOSFET | — |
| Configuration | Non-Inverting | — |
| Channel Type | Single | — |
| Driven Supply Voltage | [DATA_NEEDED: VCC max value] | — |
| Peak Source Current | 1.5 A | — |
| Peak Sink Current | 1.5 A | — |
| Common-Mode Voltage (CMR) | 200 V | — |
| Input Type | Truly Differential Input (TDI) | — |
| Propagation Delay (Typ.) | [DATA_NEEDED: tpd typical value] | — |
| Rise / Fall Time (Typ.) | [DATA_NEEDED: tr / tf typical value] | — |
| Betriebstemperaturbereich | -40C to +125C | — |
| Gehäuse | PG-VSON-10-4 | PG-WSON-8-1 (3 mm x 3 mm) with exposed thermal pad |
| Montageart | Surface Mount | Surface Mount |
| MSL-Level | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: MSL level] |
| RoHS-Status | Compliant | Compliant |
| Reach | Compliant | — |
| Lead-Free | Yes | — |
| Input Logic Compatibility | 3.3 V / 5 V TTL/CMOS (TDI) | — |
| Product Type | — | Low-side gate driver IC |
| Number of Channels | — | 2 (dual) |
| Drive Current (Source/Sink) | — | 5 A peak |
| Input Logic | — | Non-inverting, TTL / 3.3 V CMOS-compatible |
| Input Voltage Tolerance | — | -10 V to +20 V on logic pins |
| Supply Voltage (VCC) | — | 4.5 V to 20 V [DATA_NEEDED: exact range] |
| Propagation Delay | — | 20 ns typical [DATA_NEEDED: exact figure] |
| Channel-to-Channel Delay Matching | — | 1 ns |
| Anstiegszeit | — | 5 ns typical [DATA_NEEDED: exact test condition] |
| Abfallzeit | — | 5 ns typical [DATA_NEEDED: exact test condition] |
| Output Stage | — | Rail-to-rail, separate source/sink |
| UVLO Protection | — | Yes |
| Betriebstemperatur | — | -40 C to +125 C |
| Target Devices | — | Standard MOSFETs, superjunction MOSFETs, GaN HEMTs |