2EDL8124GXUMA1 vs 2ED21064S06JXUMA1 Vergleich
Detaillierter Direktvergleich von 2EDL8124GXUMA1 von Infineon und 2ED21064S06JXUMA1 von Infineon. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Infineon
2EDL8124GXUMA1 - 120V Boot 4A Junction-isolated Gate Driver | Infineon
2EDL8124GXUMA1 ✓ AktivSpezifikationsvergleich
| Parameter | 2EDL8124GXUMA1 | 2ED21064S06JXUMA1 |
|---|---|---|
| Marke | Infineon | Infineon |
| Kategorie | Power MOSFET Drivers | Power MOSFET Drivers |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $0,98 | $0,85 |
| Driver Configuration | Half-bridge (high-side + low-side) | — |
| Input Type | Non-inverting, TTL-compatible with hysteresis | — |
| Number of Drivers | 2 | — |
| Peak Source Current | 3 A | — |
| Peak Sink Current | 4 A | — |
| Bootstrap Supply (VBS) Maximum | 120 V | — |
| VCC Supply Range | [DATA_NEEDED: VCC min/max typical range] | — |
| Isolation Type | Junction isolation (JI) | — |
| Bootstrap Diode | Integrated | Integrated |
| Propagation Delay (typical) | < 50 ns | 100 ns |
| Delay Matching Between Channels | [DATA_NEEDED: delay matching spec in ns] | — |
| UVLO | Present on VCC and VBS | — |
| Betriebstemperaturbereich | [DATA_NEEDED: operating temperature range in C] | — |
| Gehäuse | PG-VDSON-8-4 (4 mm x 4 mm) with exposed pad | PG-DSO-14 (14-pin SOIC) |
| Montageart | Surface Mount | Surface Mount |
| MSL-Level | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: MSL level] |
| RoHS-Status | Compliant | ROHS3 Compliant |
| Lead-Free | Yes | — |
| Funktion | — | High-Side and Low-Side Gate Driver |
| Configuration | — | Half-Bridge (2 outputs, non-inverting) |
| Topologie | — | High-Side, Low-Side with integrated bootstrap diode |
| Maximum Offset / Boot Voltage | — | 650 V |
| Supply Voltage (VCC) | — | 10 V to 20 V |
| Source Current (typical) | — | 0.29 A |
| Sink Current (typical) | — | 0.7 A |
| Rise Time (typical) | — | [DATA_NEEDED: rise time] |
| Fall Time (typical) | — | [DATA_NEEDED: fall time] |
| Channel-to-Channel Delay Match | — | [DATA_NEEDED: channel-to-channel delay match] |
| Under-Voltage Lockout | — | Yes (both channels) |
| Input Logic Compatibility | — | 3.3 V / 5 V CMOS |
| Betriebstemperatur | — | -40C to +125C |
| Negative Gate Drive Robustness | — | -0.7 V |