5CSXFC6C6U23C8N vs 5CSXFC6C6U23C8NES Vergleich
Detaillierter Direktvergleich von 5CSXFC6C6U23C8N von Intel und 5CSXFC6C6U23C8NES von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
5CSXFC6C6U23C8N - Cyclone V SX SoC FPGA, 110K LE, ARM Cortex-A9 | Intel
5CSXFC6C6U23C8N ✓ AktivSpezifikationsvergleich
| Parameter | 5CSXFC6C6U23C8N | 5CSXFC6C6U23C8NES |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $445,00 | $195,00 |
| Family | Cyclone V SX (SoC FPGA) | Cyclone V SX |
| Series | Cyclone V SX | — |
| Architecture | MCU + FPGA (Hard Processor System + FPGA fabric) | — |
| Logic Elements | 110,000 | 110,000 |
| Process Technology | 28 nm low-power (TSMC) | — |
| Core Voltage | 1.1 V | — |
| Hard Processor System (HPS) | Dual-core ARM Cortex-A9 MPCore with CoreSight | — |
| Processor Maximum Frequency | 600 MHz | — |
| HPS L1 Cache | 32 KB instruction + 32 KB data per core | — |
| HPS L2 Cache | 512 KB shared | — |
| DSP Blocks | Variable-precision DSP (number not specified in retrieved data) | — |
| Embedded Memory | M10K blocks (total Kbits [DATA_NEEDED: total embedded memory Kbits]) | — |
| Transceivers | Up to 3.125 Gbps integrated transceivers | — |
| Maximum User I/O | 145 user I/O (per DigChip summary; full count per package [DATA_NEEDED: package pinout max user I/O]) | — |
| Memory Controller | Hard controller supporting DDR2, DDR3, LPDDR2 | — |
| Gehäuse | 672-pin UFBGA (UBGA), 23x23 mm | 672-pin UBGА (23x23 mm) |
| Montageart | Surface Mount (BGA) | Surface Mount (BGA) |
| Betriebstemperatur | -40C to +100C (industrial grade, code C) | — |
| MSL-Level | 3 (per JEDEC J-STD-020, typical for large BGA) | — |
| RoHS-Status | Compliant | Compliant |
| Lead-Free / Halogen-Free | Yes (lead-free BGA; halogen status [DATA_NEEDED: halogen-free yes/no]) | — |
| Speed Grade | C8 (commercial speed grade 8) | 8 (commercial) |
| Lifecycle | Active (Cyclone V family in production) | — |
| Device Type | — | SoC FPGA (FPGA + ARM Cortex-A9 HPS) |
| Hard Processor Subsystem | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Clock Frequency (max) | — | 600 MHz |
| Process Node | — | 28 nm TSMC low-power |
| Embedded Memory (M10K + MLAB) | — | 5,140 Kbits (approx) |
| DSP Blocks (18x19 multipliers) | — | 112 |
| User I/O Pins | — | 224 |
| Betriebs-Sperrschichttemperatur | — | 0C to +85C (commercial) |
| External Memory Interfaces | — | DDR2, DDR3, LPDDR2 |
| Hard PCIe Gen2 Controllers | — | 2 |