5CSXFC6C6U23C8N vs 5CSXFC6C6U23C8NES Comparaison
Comparaison détaillée côte à côte de 5CSXFC6C6U23C8N par Intel et 5CSXFC6C6U23C8NES par Intel. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Intel
5CSXFC6C6U23C8N - Cyclone V SX SoC FPGA, 110K LE, ARM Cortex-A9 | Intel
5CSXFC6C6U23C8N ✓ ActifComparaison des spécifications
| Paramètre | 5CSXFC6C6U23C8N | 5CSXFC6C6U23C8NES |
|---|---|---|
| Marque | Intel | Intel |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $445,00 | $195,00 |
| Family | Cyclone V SX (SoC FPGA) | Cyclone V SX |
| Series | Cyclone V SX | — |
| Architecture | MCU + FPGA (Hard Processor System + FPGA fabric) | — |
| Logic Elements | 110,000 | 110,000 |
| Process Technology | 28 nm low-power (TSMC) | — |
| Core Voltage | 1.1 V | — |
| Hard Processor System (HPS) | Dual-core ARM Cortex-A9 MPCore with CoreSight | — |
| Processor Maximum Frequency | 600 MHz | — |
| HPS L1 Cache | 32 KB instruction + 32 KB data per core | — |
| HPS L2 Cache | 512 KB shared | — |
| DSP Blocks | Variable-precision DSP (number not specified in retrieved data) | — |
| Embedded Memory | M10K blocks (total Kbits [DATA_NEEDED: total embedded memory Kbits]) | — |
| Transceivers | Up to 3.125 Gbps integrated transceivers | — |
| Maximum User I/O | 145 user I/O (per DigChip summary; full count per package [DATA_NEEDED: package pinout max user I/O]) | — |
| Memory Controller | Hard controller supporting DDR2, DDR3, LPDDR2 | — |
| Boîtier | 672-pin UFBGA (UBGA), 23x23 mm | 672-pin UBGА (23x23 mm) |
| Type de montage | Surface Mount (BGA) | Surface Mount (BGA) |
| Température de fonctionnement | -40C to +100C (industrial grade, code C) | — |
| Niveau MSL | 3 (per JEDEC J-STD-020, typical for large BGA) | — |
| Statut RoHS | Compliant | Compliant |
| Lead-Free / Halogen-Free | Yes (lead-free BGA; halogen status [DATA_NEEDED: halogen-free yes/no]) | — |
| Speed Grade | C8 (commercial speed grade 8) | 8 (commercial) |
| Lifecycle | Active (Cyclone V family in production) | — |
| Device Type | — | SoC FPGA (FPGA + ARM Cortex-A9 HPS) |
| Hard Processor Subsystem | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Clock Frequency (max) | — | 600 MHz |
| Process Node | — | 28 nm TSMC low-power |
| Embedded Memory (M10K + MLAB) | — | 5,140 Kbits (approx) |
| DSP Blocks (18x19 multipliers) | — | 112 |
| User I/O Pins | — | 224 |
| Température de jonction en fonctionnement | — | 0C to +85C (commercial) |
| External Memory Interfaces | — | DDR2, DDR3, LPDDR2 |
| Hard PCIe Gen2 Controllers | — | 2 |