EP1SGX25FF1020I6N vs EP1SGX25FF1020I7 Vergleich
Detaillierter Direktvergleich von EP1SGX25FF1020I6N von Altera und EP1SGX25FF1020I7 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EP1SGX25FF1020I7 - Stratix GX FPGA 25,660 Cells, 1.5V, FC-FBGA-1020 | Altera / Intel
EP1SGX25FF1020I7 ObsoleteSpezifikationsvergleich
| Parameter | EP1SGX25FF1020I6N | EP1SGX25FF1020I7 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $145,00 | $210,00 |
| Manufacturer | Altera (Intel) | — |
| Series | Stratix GX | EP1SGX25 |
| Family | Stratix GX FPGA | Stratix GX |
| Logic Elements (LE) | 25,660 | — |
| Number of LABs/CLBs | 2,566 | — |
| Total RAM Bits | 1,944,576 | — |
| User I/O Count | 607 | — |
| Supply Voltage - Core | 1.425 V to 1.575 V | — |
| Betriebstemperatur | -40 °C to +100 °C (Industrial) | — |
| Montageart | Surface Mount | Surface Mount (FC-FBGA) |
| Gehäuse / Bauform | 1020-BBGA, FCBGA | — |
| Supplier Device Package | 1020-FBGA (33x33) | — |
| Speed Grade | 6 | 7 (highest production grade) |
| Process Node | 0.13 µm | — |
| Embedded Transceivers | Stratix GX multi-gigabit transceivers (MGTs) | Yes (Stratix GX feature) |
| RoHS-Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance] |
| Logic Cells | — | 25,660 |
| Configurable Logic Blocks (CLBs) | — | 2,566 |
| Process Technology | — | 130 nm CMOS |
| Core Supply Voltage | — | 1.5 V |
| Gehäuse | — | FC-FBGA-1020 (Flip-Chip Fine-pitch BGA) |
| Number of Terminals / Balls | — | 1020 |
| Terminal Form | — | Ball |
| Temperature Grade (suffix 'I') | — | Industrial |
| Terminal Pitch | — | [DATA_NEEDED: terminal pitch] |
| Combinatorial Delay per CLB | — | 9.48 ns (per Microchip USA listing) |
| Combinatorial Delay Variant | — | [DATA_NEEDED: tPD per CLB variant speed grade] |
| Maximum Internal Clock Frequency | — | [DATA_NEEDED: max Fmax in MHz per speed grade] |
| Configuration Method | — | SRAM-based (volatile, requires configuration at power-up) |
| MSL-Level | — | [DATA_NEEDED: MSL level] |