EP1SGX25FF1020I6N vs EP1SGX25FF1020I7 Comparison
Detailed side-by-side comparison of EP1SGX25FF1020I6N by Altera and EP1SGX25FF1020I7 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP1SGX25FF1020I7 - Stratix GX FPGA 25,660 Cells, 1.5V, FC-FBGA-1020 | Altera / Intel
EP1SGX25FF1020I7 ObsoleteSpecification Comparison
| Parameter | EP1SGX25FF1020I6N | EP1SGX25FF1020I7 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $145.00 | $210.00 |
| Manufacturer | Altera (Intel) | — |
| Series | Stratix GX | EP1SGX25 |
| Family | Stratix GX FPGA | Stratix GX |
| Logic Elements (LE) | 25,660 | — |
| Number of LABs/CLBs | 2,566 | — |
| Total RAM Bits | 1,944,576 | — |
| User I/O Count | 607 | — |
| Supply Voltage - Core | 1.425 V to 1.575 V | — |
| Operating Temperature | -40 °C to +100 °C (Industrial) | — |
| Mounting Type | Surface Mount | Surface Mount (FC-FBGA) |
| Package / Case | 1020-BBGA, FCBGA | — |
| Supplier Device Package | 1020-FBGA (33x33) | — |
| Speed Grade | 6 | 7 (highest production grade) |
| Process Node | 0.13 µm | — |
| Embedded Transceivers | Stratix GX multi-gigabit transceivers (MGTs) | Yes (Stratix GX feature) |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance] |
| Logic Cells | — | 25,660 |
| Configurable Logic Blocks (CLBs) | — | 2,566 |
| Process Technology | — | 130 nm CMOS |
| Core Supply Voltage | — | 1.5 V |
| Package | — | FC-FBGA-1020 (Flip-Chip Fine-pitch BGA) |
| Number of Terminals / Balls | — | 1020 |
| Terminal Form | — | Ball |
| Temperature Grade (suffix 'I') | — | Industrial |
| Terminal Pitch | — | [DATA_NEEDED: terminal pitch] |
| Combinatorial Delay per CLB | — | 9.48 ns (per Microchip USA listing) |
| Combinatorial Delay Variant | — | [DATA_NEEDED: tPD per CLB variant speed grade] |
| Maximum Internal Clock Frequency | — | [DATA_NEEDED: max Fmax in MHz per speed grade] |
| Configuration Method | — | SRAM-based (volatile, requires configuration at power-up) |
| MSL Level | — | [DATA_NEEDED: MSL level] |