EP20K400FC672-3 vs EP20K400FC672-3X Vergleich
Detaillierter Direktvergleich von EP20K400FC672-3 von Altera und EP20K400FC672-3X von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EP20K400FC672-3X - APEX 20K 400K Gates FPGA, 672-BGA | Altera
EP20K400FC672-3X ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP20K400FC672-3 | EP20K400FC672-3X |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $138,00 | $152,40 |
| Family | APEX 20K | — |
| Device Logic Elements | 16,640 cells | — |
| Typical Gate Count | 400,000 system gates | — |
| Maximum User I/Os | 502 | — |
| Propagation Delay | 2.5 ns | — |
| Internal Performance | 167 MHz | — |
| Process Technology | 0.22 µm CMOS | — |
| Core Supply Voltage | 2.5 V | 2.5 V |
| Logic Family | CMOS, SRAM-based | APEX 20K |
| Gehäuse | 672-pin FC-FBGA | 672-ball FC-FBGA (Fine-pitch Chip-Scale BGA) |
| Package Code | BGA | — |
| Number of Terminals | 672 | — |
| Terminal Form | Ball (BGA) | — |
| Speed Grade | -3 (commercial fastest) | -3X |
| Betriebstemperatur | 0 °C to 85 °C | 0 °C to 85 °C (commercial) |
| Montageart | Surface Mount | Surface Mount (BGA) |
| Architecture | MultiCore (LUT + Embedded System Blocks) | MultiCore (LUT + embedded CAM/RAM) |
| Programming Method | SRAM, JTAG (ByteBlaster) | — |
| Lebenszyklusstatus | Obsolete / Legacy | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance] |
| Device Sub-family | — | EP20K400 |
| Technology | — | CMOS 0.22 µm |
| Number of Gates | — | 400,000 (typical) |
| Logic Cells | — | 16,640 |
| Macros / Macrocells | — | 1664 |
| User I/Os | — | 502 |
| Dedicated I/O Lines | — | 496 |
| Maximale Taktfrequenz | — | 181.82 MHz |
| Typical Propagation Delay | — | 2.07 ns |
| Programming Interface | — | JTAG (IEEE 1149.1) / ByteBlaster / MasterBlaster |