EP20K400FC672-3 vs EP20K400FC672-3X Comparaison
Comparaison détaillée côte à côte de EP20K400FC672-3 par Altera et EP20K400FC672-3X par Altera. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Altera
EP20K400FC672-3X - APEX 20K 400K Gates FPGA, 672-BGA | Altera
EP20K400FC672-3X ⚠ Dernier achatComparaison des spécifications
| Paramètre | EP20K400FC672-3 | EP20K400FC672-3X |
|---|---|---|
| Marque | Altera | Altera |
| Catégorie | FPGA & CPLD | FPGA & CPLD |
| Statut du cycle de vie | Obsolete | Dernier achat |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $138,00 | $152,40 |
| Family | APEX 20K | — |
| Device Logic Elements | 16,640 cells | — |
| Typical Gate Count | 400,000 system gates | — |
| Maximum User I/Os | 502 | — |
| Propagation Delay | 2.5 ns | — |
| Internal Performance | 167 MHz | — |
| Process Technology | 0.22 µm CMOS | — |
| Core Supply Voltage | 2.5 V | 2.5 V |
| Logic Family | CMOS, SRAM-based | APEX 20K |
| Boîtier | 672-pin FC-FBGA | 672-ball FC-FBGA (Fine-pitch Chip-Scale BGA) |
| Package Code | BGA | — |
| Number of Terminals | 672 | — |
| Terminal Form | Ball (BGA) | — |
| Speed Grade | -3 (commercial fastest) | -3X |
| Température de fonctionnement | 0 °C to 85 °C | 0 °C to 85 °C (commercial) |
| Type de montage | Surface Mount | Surface Mount (BGA) |
| Architecture | MultiCore (LUT + Embedded System Blocks) | MultiCore (LUT + embedded CAM/RAM) |
| Programming Method | SRAM, JTAG (ByteBlaster) | — |
| Statut du cycle de vie | Obsolete / Legacy | — |
| Statut RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance] |
| Device Sub-family | — | EP20K400 |
| Technology | — | CMOS 0.22 µm |
| Number of Gates | — | 400,000 (typical) |
| Logic Cells | — | 16,640 |
| Macros / Macrocells | — | 1664 |
| User I/Os | — | 502 |
| Dedicated I/O Lines | — | 496 |
| Fréquence d'horloge maximale | — | 181.82 MHz |
| Typical Propagation Delay | — | 2.07 ns |
| Programming Interface | — | JTAG (IEEE 1149.1) / ByteBlaster / MasterBlaster |