EP3SE260F1517C4LN vs EP3SE260F1517I4LN Vergleich

Detaillierter Direktvergleich von EP3SE260F1517C4LN von Intel und EP3SE260F1517I4LN von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Intel
EP3SE260F1517C4LN EP3SE260F1517C4LN - Stratix III E FPGA 255K LE, 1517-BGA | Intel

EP3SE260F1517C4LN - Stratix III E FPGA 255K LE, 1517-BGA | Intel

EP3SE260F1517C4LN ⚠ Letzte Bestellmöglichkeit
Intel
EP3SE260F1517I4LN EP3SE260F1517I4LN - 260K LE Stratix III E FPGA, 1517-FCBGA | Intel

EP3SE260F1517I4LN - 260K LE Stratix III E FPGA, 1517-FCBGA | Intel

EP3SE260F1517I4LN ⚠ Letzte Bestellmöglichkeit

Spezifikationsvergleich

Parameter EP3SE260F1517C4LN EP3SE260F1517I4LN
Marke Intel Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Letzte Kaufgelegenheit Letzte Kaufgelegenheit
Lagerstatus In Stock In Stock
Stückpreis (USD) $1.450,00 $2.895,00
Series Stratix III E —
Family Stratix III E (Enhanced) Stratix III E (Enhanced)
Logic Elements 255,000 255,000
Number of LABs/CLBs 10,200 —
Total Memory Bits 16,672,768 (16.67 Mbit) —
Number of I/O 976 —
Number of Gates [DATA_NEEDED: gate count not published in web data] —
Voltage - Supply 0.9 V to 1.1 V core —
Operating Frequency 375 MHz to 450 MHz (per family) —
Process Technology 65 nm 40 nm CMOS
Gehäuse / Bauform 1517-BBGA, FCBGA (FC-FBGA) —
Montageart Surface Mount (flip-chip) —
Betriebstemperatur 0C to +85C (commercial grade per 'C' suffix) -40C to +100C (case, industrial)
Feuchtigkeitsempfindlichkeitsgrad (MSL) 3 (168 Hours) —
Packaging Tray —
Speed Grade C4 I4 (industrial, 4th tier)
Lead-Free / Halogen-Free Yes (LN suffix) —
RoHS-Status Compliant —
Embedded Memory Bits — 16,672,768 bits (~2,044 KBytes)
Logic Array Blocks (LABs) — 10,200
User I/O Count — 976
Gehäuse — 1517-ball FCBGA (40 mm x 40 mm, 1.0 mm pitch)
Power Option — L (low-power)
Lead-Free / RoHS — Yes (N suffix)
Transceivers — Stratix III E family supports up to 24 transceivers up to 8.5 Gbps
DSP Blocks (18x18 multipliers) — Up to 384 (family-level, device-specific count not in provided data)
Partial Reconfiguration — Supported
Memory Interface Support — DDR3, DDR2, QDR II+ (hardened PHY)
Configuration Scheme — Active Serial (AS), Passive Serial (PS), Fast Passive Parallel (FPP), JTAG

Datenblätter & Ressourcen

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