EP3SL70F484I3 vs EP3SL70F484I3G Vergleich
Detaillierter Direktvergleich von EP3SL70F484I3 von Intel und EP3SL70F484I3G von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP3SL70F484I3 - Stratix III L FPGA, 67.5K LE, 484-FBGA | Intel
EP3SL70F484I3 ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EP3SL70F484I3 | EP3SL70F484I3G |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $1.013,66 | $305,00 |
| Family | Stratix III L | Stratix III (low-power variant) |
| Logic Elements | 67,500 | — |
| Adaptive Logic Modules (ALMs) | 33,000 | — |
| Logic Array Blocks (LABs) | 2,700 | — |
| Total Embedded Memory | 2,699,264 bits (337 KB) | — |
| M9K Memory Blocks | 288 | — |
| M144K Memory Blocks | 12 | — |
| DSP Blocks (18x18 multipliers) | 384 | — |
| User I/O Pins | 296 | 296 |
| Transceivers | Up to 12 (3.75 Gbps) [DATA_NEEDED: confirm exact count for F484 package] | 24 |
| PLLs | 8 (4 enhanced PLLs + 4 fast PLLs) | — |
| Process Node | TSMC 40 nm | — |
| Speed Grade | -3 (mid-tier) | I3 |
| Betriebstemperatur | -40C to +100C (industrial) | — |
| Gehäuse | 484-ball Flip-Chip BGA (FBGA-484), 1.0 mm pitch | — |
| Configuration Modes | FPP, AS, PS, JTAG, AES encryption | — |
| Design Software | Quartus II (legacy) | — |
| RoHS-Status | Compliant | Compliant |
| Series | — | Stratix III L |
| Logic Elements (LE) | — | 67,500 |
| ALMs (Adaptive Logic Modules) | — | [DATA_NEEDED: ALM count] |
| Total Memory Bits | — | 2,699,264 |
| DSP Blocks | — | [DATA_NEEDED: DSP block count] |
| Maximum Transceiver Data Rate | — | [DATA_NEEDED: max transceiver Gbps] |
| Package Type | — | 484-ball FCBGA (Fine-pitch Chip-Scale BGA) |
| Package Pin Count | — | 484 |
| Betriebstemperaturbereich | — | -40C to +100C (Industrial) |
| Core Voltage | — | 1.0 V |
| Process Technology | — | 40 nm TSMC |
| Montageart | — | Surface Mount |
| MSL-Level | — | [DATA_NEEDED: MSL level] |
| Configuration Interface | — | JTAG / Serial Passive / Active Serial |