EP610DC35 vs EP610DI-35 Vergleich
Detaillierter Direktvergleich von EP610DC35 von Altera und EP610DI-35 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EP610DI-35 - 16-Macrocell Classic EPLD, 35ns, 5V, 24-CDIP | Intel / Altera
EP610DI-35 ObsoleteSpezifikationsvergleich
| Parameter | EP610DC35 | EP610DI-35 |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $19,20 | $9,85 |
| Family | Classic EPLD | Altera Classic EPLD |
| Logic Elements | 16 macrocells | — |
| Usable Gates | 300 | 300 |
| Propagation Delay (tPD) | 35 ns | — |
| Maximum Frequency | 28.6 MHz | — |
| Pipelined Data Rate | up to 100 MHz | — |
| Versorgungsspannung | 5 V | 5 V |
| Gehäuse | 24-pin CDIP (Ceramic DIP) with quartz erase window | 24-pin CDIP (Ceramic DIP) |
| Montageart | Through-Hole | Through-hole |
| Pin-Anzahl | 24 | — |
| Technology | UV-erasable CMOS EPROM | CMOS, UV-erasable |
| Programming Method | Altera legacy programmer (PLDLMax or compatible) | — |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: industrial/commercial grade range] |
| RoHS-Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: not confirmed in supplied web data] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| I/O Pins | [DATA_NEEDED: number of user I/O pins] | 16 bidirectional |
| Series | — | EP610 |
| Logic Cells / Macrocells | — | 16 macrocells |
| Product Terms | — | 160 |
| Total Inputs | — | 20 (including 4 dedicated inputs) |
| Propagation Delay (tpd) | — | 35 ns |
| Maximum Toggle Frequency | — | 28.6 MHz |
| Internal Pipelined Data Rate | — | Up to 100 MHz |