EP610DC35 vs EP610DI-35 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EP610DC35 disebabkan oleh Altera dan EP610DI-35 disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EP610DC35 EP610DI-35
Merek Altera Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family Classic EPLD Altera Classic EPLD
Logic Elements 16 macrocells —
Usable Gates 300 300
Propagation Delay (tPD) 35 ns —
Maximum Frequency 28.6 MHz —
Pipelined Data Rate up to 100 MHz —
Tegangan Pemberi Arus 5 V 5 V
Kemasan 24-pin CDIP (Ceramic DIP) with quartz erase window 24-pin CDIP (Ceramic DIP)
Jenis Pemasangan Through-Hole Through-hole
Kiraan Pin 24 —
Technology UV-erasable CMOS EPROM CMOS, UV-erasable
Programming Method Altera legacy programmer (PLDLMax or compatible) —
Suhu Operasi [DATA_NEEDED: operating temperature range] [DATA_NEEDED: industrial/commercial grade range]
Status RoHS [DATA_NEEDED: RoHS status] [DATA_NEEDED: not confirmed in supplied web data]
Lead-Free [DATA_NEEDED: lead-free status] —
I/O Pins [DATA_NEEDED: number of user I/O pins] 16 bidirectional
Series — EP610
Logic Cells / Macrocells — 16 macrocells
Product Terms — 160
Total Inputs — 20 (including 4 dedicated inputs)
Propagation Delay (tpd) — 35 ns
Maximum Toggle Frequency — 28.6 MHz
Internal Pipelined Data Rate — Up to 100 MHz

Laporan Datasheet & Sumber

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