EP610DC35 vs EP610DI-35 Perbandingan

Perbandingan bersamaan detil EP610DC35 dari Altera dan EP610DI-35 dari Intel. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EP610DC35 EP610DI-35
Merek Altera Intel
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family Classic EPLD Altera Classic EPLD
Logic Elements 16 macrocells —
Usable Gates 300 300
Propagation Delay (tPD) 35 ns —
Maximum Frequency 28.6 MHz —
Pipelined Data Rate up to 100 MHz —
Tegangan Pemuat 5 V 5 V
Paket 24-pin CDIP (Ceramic DIP) with quartz erase window 24-pin CDIP (Ceramic DIP)
Tipe Mounting Through-Hole Through-hole
Jumlah Pin 24 —
Technology UV-erasable CMOS EPROM CMOS, UV-erasable
Programming Method Altera legacy programmer (PLDLMax or compatible) —
Suhu Kerja [DATA_NEEDED: operating temperature range] [DATA_NEEDED: industrial/commercial grade range]
Status RoHS [DATA_NEEDED: RoHS status] [DATA_NEEDED: not confirmed in supplied web data]
Lead-Free [DATA_NEEDED: lead-free status] —
I/O Pins [DATA_NEEDED: number of user I/O pins] 16 bidirectional
Series — EP610
Logic Cells / Macrocells — 16 macrocells
Product Terms — 160
Total Inputs — 20 (including 4 dedicated inputs)
Propagation Delay (tpd) — 35 ns
Maximum Toggle Frequency — 28.6 MHz
Internal Pipelined Data Rate — Up to 100 MHz

Spek dan Sumber

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