EP610DC35 vs EP610DI-35 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP610DC35 sa pamamagitan ng Altera at EP610DI-35 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP610DI-35 - 16-Macrocell Classic EPLD, 35ns, 5V, 24-CDIP | Intel / Altera
EP610DI-35 ObsoletePagsanggunian na paghahambing
| Parametro | EP610DC35 | EP610DI-35 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | Classic EPLD | Altera Classic EPLD |
| Logic Elements | 16 macrocells | — |
| Usable Gates | 300 | 300 |
| Propagation Delay (tPD) | 35 ns | — |
| Maximum Frequency | 28.6 MHz | — |
| Pipelined Data Rate | up to 100 MHz | — |
| Volte ng Pagbibigay | 5 V | 5 V |
| Packhaging | 24-pin CDIP (Ceramic DIP) with quartz erase window | 24-pin CDIP (Ceramic DIP) |
| Uri ng Pagpapasok | Through-Hole | Through-hole |
| Bilang ng Pin | 24 | — |
| Technology | UV-erasable CMOS EPROM | CMOS, UV-erasable |
| Programming Method | Altera legacy programmer (PLDLMax or compatible) | — |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: industrial/commercial grade range] |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: not confirmed in supplied web data] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| I/O Pins | [DATA_NEEDED: number of user I/O pins] | 16 bidirectional |
| Series | — | EP610 |
| Logic Cells / Macrocells | — | 16 macrocells |
| Product Terms | — | 160 |
| Total Inputs | — | 20 (including 4 dedicated inputs) |
| Propagation Delay (tpd) | — | 35 ns |
| Maximum Toggle Frequency | — | 28.6 MHz |
| Internal Pipelined Data Rate | — | Up to 100 MHz |