EP910PI-20T vs EP910PI-30T Vergleich
Detaillierter Direktvergleich von EP910PI-20T von Intel und EP910PI-30T von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP910PI-20T | EP910PI-30T |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,95 | $10,95 |
| Family | Altera Classic EPLD | Altera Classic EPLD |
| Device | EP910 | — |
| Number of Macrocells | 24 | — |
| Number of Usable Gates | [DATA_NEEDED: usable gate count] | — |
| Propagation Delay (tpd) | 20 ns | — |
| Maximum Toggle Frequency | 62.5 MHz | — |
| Number of Dedicated Inputs | 12 | — |
| Number of I/O Pins | 20 | — |
| Anzahl der Pins | 40 | — |
| Gehäuse | PDIP-40 (PI) | — |
| Montageart | Through-Hole (DIP) | Through-Hole |
| Technology | CMOS EPROM (UV-erasable) | CMOS, UV-erasable (windowed ceramic) |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range] | -40 C to +85 C (industrial) |
| Programming | Standard EPROM programmer, JEDEC map | Altera Classic device programmer / MAX+PLUS II flow |
| RoHS-Status | unknown | [DATA_NEEDED: RoHS status] |
| Lebenszyklusstatus | Not Recommended for New Designs (NRND) | — |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Macrocells | — | 24 |
| Usable Gates | — | 480 |
| Dedicated Inputs | — | 10 |
| Propagation Delay (tPD) | — | 30 ns |
| Register (Clock-to-Output) Delay | — | 20 ns |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V (5 V nominal) |
| Package Type | — | 40-pin PDIP (ceramic windowed) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |