EP910PI-20T vs EP910PI-30T Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP910PI-20T sa pamamagitan ng Intel at EP910PI-30T sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP910PI-20T | EP910PI-30T |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | Altera Classic EPLD | Altera Classic EPLD |
| Device | EP910 | — |
| Number of Macrocells | 24 | — |
| Number of Usable Gates | [DATA_NEEDED: usable gate count] | — |
| Propagation Delay (tpd) | 20 ns | — |
| Maximum Toggle Frequency | 62.5 MHz | — |
| Number of Dedicated Inputs | 12 | — |
| Number of I/O Pins | 20 | — |
| Bilang ng Pins | 40 | — |
| Packhaging | PDIP-40 (PI) | — |
| Uri ng Pagpapasok | Through-Hole (DIP) | Through-Hole |
| Technology | CMOS EPROM (UV-erasable) | CMOS, UV-erasable (windowed ceramic) |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | -40 C to +85 C (industrial) |
| Programming | Standard EPROM programmer, JEDEC map | Altera Classic device programmer / MAX+PLUS II flow |
| Tindminan RoHS | unknown | [DATA_NEEDED: RoHS status] |
| Katayuan ng Lifecycle | Not Recommended for New Designs (NRND) | — |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Macrocells | — | 24 |
| Usable Gates | — | 480 |
| Dedicated Inputs | — | 10 |
| Propagation Delay (tPD) | — | 30 ns |
| Register (Clock-to-Output) Delay | — | 20 ns |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V (5 V nominal) |
| Package Type | — | 40-pin PDIP (ceramic windowed) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |