EP910PI-35T vs EP910PI-30T Vergleich
Detaillierter Direktvergleich von EP910PI-35T von Altera und EP910PI-30T von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EP910PI-35T | EP910PI-30T |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $11,15 | $10,95 |
| Family | Altera Classic EPLD | Altera Classic EPLD |
| Device Type | Erasable Programmable Logic Device (EPLD) | — |
| Macrocells | 24 | 24 |
| Usable Gates | 450 | 480 |
| Pin-to-Pin Logic Delay (tpd) | 35 ns | — |
| Counter Frequency (fCNT) | 28.6 MHz | — |
| Supply Voltage (VCC) | 5 V | 4.75 V to 5.25 V (5 V nominal) |
| I/O Logic Compatibility | 100% TTL emulation | — |
| Process Technology | CMOS | — |
| Gehäuse | 40-pin PDIP (Plastic DIP) | — |
| Montageart | Through-Hole | Through-Hole |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range] | -40 C to +85 C (industrial) |
| Programming Method | UV-erasable, EPROM technology | — |
| On-board Test Circuitry | Yes (logic test mode for AC verification) | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| MSL-Level | [DATA_NEEDED: MSL level] | — |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Dedicated Inputs | — | 10 |
| Propagation Delay (tPD) | — | 30 ns |
| Register (Clock-to-Output) Delay | — | 20 ns |
| Technology | — | CMOS, UV-erasable (windowed ceramic) |
| Package Type | — | 40-pin PDIP (ceramic windowed) |
| Programming | — | Altera Classic device programmer / MAX+PLUS II flow |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |