EPC2LC20 vs EPC1LC120 Vergleich
Detaillierter Direktvergleich von EPC2LC20 von Altera und EPC1LC120 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPC2LC20 | EPC1LC120 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | Memory ICs | Memory ICs |
| Lebenszyklusstatus | NRND | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $7,20 | $9,30 |
| Speichertyp | Non-volatile configuration PROM | Serial Configuration Memory (Flash-based, non-volatile) |
| Speichergröße | 1.6 Mbit | — |
| Configuration Interface | Serial (x1) to FPGA via DCLK/nCONFIG/nSTATUS/CONF_DONE | — |
| Programming Interface | IEEE 1149.1 (JTAG) ISP, 5.0-V and 3.3-V tolerant | — |
| Supply Voltage VCC | 3.0 V to 3.6 V (3.3-V operation) | — |
| ISP Voltage Range | 5.0 V or 3.3 V | — |
| Supported FPGA Families | ACEX 1K, APEX 20K/20KC/20KE, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, MAX 9000 | APEX 20K, ACEX 1K, Cyclone, MAX, Mercury, Stratix-class |
| Cascade Support | Yes - daisy-chain multiple EPC2 devices via JTAG for larger bitstreams | — |
| Gehäuse | 20-pin PLCC (J-lead, 9x9 mm) | LQFP-120 (Low-profile Quad Flat Pack) |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | -40C to +85C (industrial) [DATA_NEEDED: exact grade from datasheet] | — |
| RoHS-Status | Non-Compliant (original Altera Pb-containing part) | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free Version | EPC2LC20N available as lead-free equivalent | — |
| Programming Support | Altera Programming Unit (APU), Quartus II, JTAG programmer | — |
| Boundary-Scan | IEEE 1149.1 compliant, 8-bit or 16-bit JTAG | — |
| Memory Density | — | 1 Mbit |
| Serial Clock Frequency (DCLK) | — | 8 MHz |
| Schnittstelle | — | Altera / Intel proprietary FPGA-configuration serial bus (DATA, DCLK, nCONFIG, nSTATUS, CONF_DONE) |
| Betriebstemperaturbereich | — | [DATA_NEEDED: operating temperature range] |
| Versorgungsspannung | — | [DATA_NEEDED: VCC range] |
| Programming | — | Factory / JTAG via Altera programming tools |
| MSL-Level | — | [DATA_NEEDED: MSL rating] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Configuration Mode | — | Serial configuration of SRAM-based FPGAs |
| Compatible Bitstream Width | — | Serial |