EPC2LC20 vs EPC1LC120 Perbandingan

Perbandingan bersamaan detil EPC2LC20 dari Altera dan EPC1LC120 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EPC2LC20 EPC1LC120
Merek Altera Altera
Kategori Memory ICs Memory ICs
Status Lingkungan Hidup NRND Aktif
Harga Unit (USD) $7,20 —
Tipe Memori Non-volatile configuration PROM Serial Configuration Memory (Flash-based, non-volatile)
Ukuran Memori 1.6 Mbit —
Configuration Interface Serial (x1) to FPGA via DCLK/nCONFIG/nSTATUS/CONF_DONE —
Programming Interface IEEE 1149.1 (JTAG) ISP, 5.0-V and 3.3-V tolerant —
Supply Voltage VCC 3.0 V to 3.6 V (3.3-V operation) —
ISP Voltage Range 5.0 V or 3.3 V —
Supported FPGA Families ACEX 1K, APEX 20K/20KC/20KE, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, MAX 9000 APEX 20K, ACEX 1K, Cyclone, MAX, Mercury, Stratix-class
Cascade Support Yes - daisy-chain multiple EPC2 devices via JTAG for larger bitstreams —
Paket 20-pin PLCC (J-lead, 9x9 mm) LQFP-120 (Low-profile Quad Flat Pack)
Tipe Mounting Surface Mount Surface Mount
Suhu Kerja -40C to +85C (industrial) [DATA_NEEDED: exact grade from datasheet] —
Status RoHS Non-Compliant (original Altera Pb-containing part) [DATA_NEEDED: RoHS compliance status]
Lead-Free Version EPC2LC20N available as lead-free equivalent —
Programming Support Altera Programming Unit (APU), Quartus II, JTAG programmer —
Boundary-Scan IEEE 1149.1 compliant, 8-bit or 16-bit JTAG —
Memory Density — 1 Mbit
Serial Clock Frequency (DCLK) — 8 MHz
Antarmuka — Altera / Intel proprietary FPGA-configuration serial bus (DATA, DCLK, nCONFIG, nSTATUS, CONF_DONE)
Rentang Suhu Kerja — [DATA_NEEDED: operating temperature range]
Tegangan Pemuat — [DATA_NEEDED: VCC range]
Programming — Factory / JTAG via Altera programming tools
Level MSL — [DATA_NEEDED: MSL rating]
Lead-Free — [DATA_NEEDED: lead-free status]
Configuration Mode — Serial configuration of SRAM-based FPGAs
Compatible Bitstream Width — Serial

Spek dan Sumber

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