EPC2LC20 vs EPC1LC120 तुलना
विस्तृत दोनों ओर की तुलना EPC2LC20 द्वारा Altera और EPC1LC120 द्वारा Altera. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
विशेषता तुलना
| पैरामीटर | EPC2LC20 | EPC1LC120 |
|---|---|---|
| ब्रांड | Altera | Altera |
| श्रेणी | Memory ICs | Memory ICs |
| लाइफसाइकिल स्थिति | NRND | सक्रिय |
| यूनिट मूल्य (USD) | $7.20 | — |
| मेमोरी प्रकार | Non-volatile configuration PROM | Serial Configuration Memory (Flash-based, non-volatile) |
| मेमोरी आकार | 1.6 Mbit | — |
| Configuration Interface | Serial (x1) to FPGA via DCLK/nCONFIG/nSTATUS/CONF_DONE | — |
| Programming Interface | IEEE 1149.1 (JTAG) ISP, 5.0-V and 3.3-V tolerant | — |
| Supply Voltage VCC | 3.0 V to 3.6 V (3.3-V operation) | — |
| ISP Voltage Range | 5.0 V or 3.3 V | — |
| Supported FPGA Families | ACEX 1K, APEX 20K/20KC/20KE, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, MAX 9000 | APEX 20K, ACEX 1K, Cyclone, MAX, Mercury, Stratix-class |
| Cascade Support | Yes - daisy-chain multiple EPC2 devices via JTAG for larger bitstreams | — |
| पैकेज | 20-pin PLCC (J-lead, 9x9 mm) | LQFP-120 (Low-profile Quad Flat Pack) |
| माउंटिंग प्रकार | Surface Mount | Surface Mount |
| ऑपरेटिंग तापमान | -40C to +85C (industrial) [DATA_NEEDED: exact grade from datasheet] | — |
| RoHS स्थिति | Non-Compliant (original Altera Pb-containing part) | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free Version | EPC2LC20N available as lead-free equivalent | — |
| Programming Support | Altera Programming Unit (APU), Quartus II, JTAG programmer | — |
| Boundary-Scan | IEEE 1149.1 compliant, 8-bit or 16-bit JTAG | — |
| Memory Density | — | 1 Mbit |
| Serial Clock Frequency (DCLK) | — | 8 MHz |
| इंटरफ़ेस | — | Altera / Intel proprietary FPGA-configuration serial bus (DATA, DCLK, nCONFIG, nSTATUS, CONF_DONE) |
| ऑपरेटिंग तापमान रेंज | — | [DATA_NEEDED: operating temperature range] |
| सप्लाई वोल्टेज | — | [DATA_NEEDED: VCC range] |
| Programming | — | Factory / JTAG via Altera programming tools |
| MSL स्तर | — | [DATA_NEEDED: MSL rating] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Configuration Mode | — | Serial configuration of SRAM-based FPGAs |
| Compatible Bitstream Width | — | Serial |