EPC2LS20U vs EPC1LC20 Vergleich
Detaillierter Direktvergleich von EPC2LS20U von Altera und EPC1LC20 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPC2LS20U | EPC1LC20 |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | Memory ICs | Memory ICs |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $4,25 | $7,95 |
| Product Type | In-System Programmable Configuration PROM | — |
| Memory Density | 1.6 Mbit | — |
| Operating Voltage (VCC) | 3.3 V | — |
| Schnittstelle | Altera serial configuration / JTAG | — |
| Programming Method | In-System Programmable (ISP) via JTAG | — |
| Gehäuse | 20-PLCC (J-lead, 9x9 mm) | 20-pin PLCC (J-leaded, surface mount) |
| Lead-Free / RoHS | Yes (per "U" suffix) | — |
| Betriebstemperatur | [DATA_NEEDED: Operating Temperature] | [DATA_NEEDED: Operating temperature range] |
| Supported FPGA Families | Cyclone I/II, Stratix/II, APEX-II, ACEX-1K, FLEX-10K, FLEX-6000, MAX-7000 | — |
| Configuration Modes | PS (Passive Serial), AS, FPP | — |
| JTAG Support | Yes (IEEE 1149.1 boundary scan) | — |
| Done Pin | Yes (open-drain programmable polarity) | — |
| nSTATUS Pin | Yes (open-drain error flag) | — |
| nCONFIG Pin | Yes (reset/reconfiguration input) | — |
| DCLK Output | Yes (configuration clock to FPGA) | — |
| MSL-Level | [DATA_NEEDED: MSL Level] | — |
| Compliance | RoHS (Pb-free per U suffix) | — |
| Speichertyp | — | Non-volatile configuration memory (Flash/EPROM) |
| Memory Capacity | — | 1 Mbit (1,048,576 bits) |
| Schnittstellentyp | — | Serial configuration interface |
| Maximum DCLK Frequency | — | 8 MHz |
| Versorgungsspannung | — | 3.3 V or 5.0 V |
| In-System Programmability | — | Yes (IEEE 1149.1 / JTAG) |
| Programmable Voltage | — | 5.0 V and 3.3 V ISP |
| Configuration Mode | — | Serial, multi-device daisy-chain capable |
| Pin-Anzahl | — | 20 |
| Montageart | — | Surface Mount |
| Compatible FPGA Families | — | ACEX 1K, APEX 20K, FLEX 10K, Cyclone, Mercury |
| RoHS-Status | — | [DATA_NEEDED: RoHS status] |
| JTAG Pins | — | TCK, TMS, TDI, TDO |