EPM3512AQC20810N vs EPM3256AQC208-10N Vergleich
Detaillierter Direktvergleich von EPM3512AQC20810N von Altera und EPM3256AQC208-10N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM3512AQC20810N | EPM3256AQC208-10N |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $39,75 | $4,62 |
| Family | MAX 3000A | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macro Cells | 512 | — |
| Usable Gates | 10,000 | 10,000 |
| User I/Os | 172 | — |
| Logic Array Blocks (LABs) | 16 | — |
| Propagation Delay (tPD) | 10 ns | — |
| Core Voltage (VCCINT) | 3.3 V | — |
| I/O Voltage (VCCIO) | 3.3 V (5.0 V tolerant I/O) | — |
| Gehäuse | 208-pin PQFP (Plastic Quad Flat Pack) | — |
| Configuration Memory | EEPROM (non-volatile, instant-on) | — |
| Programming Interface | JTAG (IEEE 1149.1 / IEEE 1532 ISP) | — |
| Maximum Frequency | [DATA_NEEDED: fMAX] | — |
| Betriebstemperatur | [DATA_NEEDED: industrial/commercial grade range] | 0C to +70C (Commercial) |
| RoHS-Status | [DATA_NEEDED: lead-free/RoHS status] | [DATA_NEEDED: lead-free status - non-RoHS suffix 'N' typically indicates lead-free finish, but datasheet not present in data] |
| Montageart | Surface Mount | Surface Mount |
| MSL-Level | [DATA_NEEDED: MSL rating] | — |
| Series | — | MAX 3000A |
| Programmable Type | — | In-System Programmable (EEPROM) |
| Number of Macrocells | — | 256 |
| Number of Logic Elements/Blocks | — | 16 LABs |
| Number of I/O Pins | — | 161 (158 user I/O per Arrow listing) |
| Propagation Delay (tpd) | — | 10 ns (max) |
| Maximum Counter Frequency | — | 227.3 MHz |
| Supply Voltage - Internal | — | 3.0 V to 3.6 V (3.3 V typical) |
| Gehäuse / Bauform | — | 208-BFQFP / 208-PQFP (28x28 mm) |
| ISP Compliance | — | IEEE Std. 1532 |
| Boundary Scan | — | IEEE Std. 1149.1 (JTAG) |
| I/O Tolerance | — | 5 V tolerant, MultiVolt interface |