EPM5032DI-20 vs EPM5032DC-20 Vergleich

Detaillierter Direktvergleich von EPM5032DI-20 von Intel und EPM5032DC-20 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EPM5032DI-20 EPM5032DC-20
Marke Intel Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $8,75 $5,05
Family MAX 5000 (Altera legacy EPLD) —
Architecture CMOS PAL-type EPLD with PIA —
Macrocells 32 32
Dedicated Inputs 7 —
Bidirectional I/O Pins 16 —
Product Terms 320 (maximum) —
Flip-Flops 16 (one per macrocell) —
Maximale Taktfrequenz 62.5 MHz —
Pin-to-Pin Delay 20 ns (speed grade -20) —
Gehäuse Ceramic DIP-20 (windowed, UV-erasable) 20-pin DIP (Windowed Ceramic, 0.3" wide)
Betriebstemperatur Industrial (per 'I' suffix) [DATA_NEEDED: commercial/industrial/military grade]
Programming UV-erasable CMOS, JEDEC fuse file —
Development Tool Altera MAX+PLUS II (legacy) —
RoHS-Status [DATA_NEEDED: RoHS compliance status for ceramic DIP variant] Compliant (per IC-Components listing)
Lead-Free [DATA_NEEDED: lead-free status] —
Product Family — MAX 5000
Device Type — CPLD (Complex Programmable Logic Device)
Programmable Technology — UV-Erasable / OTP EPROM
Usable Gates — 600
Maximum Frequency (fCNT) — 71.4 MHz
Pin-to-Pin Delay (tPD) — 20 ns
Speed Grade — -20
Supply Voltage (VCC) — 5 V
Montageart — Through-Hole
Logic Blocks — 4 Logic Array Blocks (LABs)
I/O Pins — [DATA_NEEDED: I/O pin count for DIP-20 variant]
Lead Free — [DATA_NEEDED: confirmed lead-free]
Manufacturer — Altera (now Intel Programmable Solutions Group)
Programming Method — Altera MAX+PLUS II / Quartus (legacy support)

Datenblätter & Ressourcen

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