EPM5032DI-20 vs EPM5032DC-20 Comparison

Detailed side-by-side comparison of EPM5032DI-20 by Intel and EPM5032DC-20 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM5032DI-20 EPM5032DC-20
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $8.75 $5.05
Family MAX 5000 (Altera legacy EPLD) β€”
Architecture CMOS PAL-type EPLD with PIA β€”
Macrocells 32 32
Dedicated Inputs 7 β€”
Bidirectional I/O Pins 16 β€”
Product Terms 320 (maximum) β€”
Flip-Flops 16 (one per macrocell) β€”
Maximum Clock Frequency 62.5 MHz β€”
Pin-to-Pin Delay 20 ns (speed grade -20) β€”
Package Ceramic DIP-20 (windowed, UV-erasable) 20-pin DIP (Windowed Ceramic, 0.3" wide)
Operating Temperature Industrial (per 'I' suffix) [DATA_NEEDED: commercial/industrial/military grade]
Programming UV-erasable CMOS, JEDEC fuse file β€”
Development Tool Altera MAX+PLUS II (legacy) β€”
RoHS Status [DATA_NEEDED: RoHS compliance status for ceramic DIP variant] Compliant (per IC-Components listing)
Lead-Free [DATA_NEEDED: lead-free status] β€”
Product Family β€” MAX 5000
Device Type β€” CPLD (Complex Programmable Logic Device)
Programmable Technology β€” UV-Erasable / OTP EPROM
Usable Gates β€” 600
Maximum Frequency (fCNT) β€” 71.4 MHz
Pin-to-Pin Delay (tPD) β€” 20 ns
Speed Grade β€” -20
Supply Voltage (VCC) β€” 5 V
Mounting Type β€” Through-Hole
Logic Blocks β€” 4 Logic Array Blocks (LABs)
I/O Pins β€” [DATA_NEEDED: I/O pin count for DIP-20 variant]
Lead Free β€” [DATA_NEEDED: confirmed lead-free]
Manufacturer β€” Altera (now Intel Programmable Solutions Group)
Programming Method β€” Altera MAX+PLUS II / Quartus (legacy support)

Datasheets & Resources

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