EPM5192AJC-25 vs EPM5192AGC-20 Vergleich
Detaillierter Direktvergleich von EPM5192AJC-25 von Altera und EPM5192AGC-20 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM5192AJC-25 | EPM5192AGC-20 |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $8,20 | $9,95 |
| Family | MAX 5000 EPLD | MAX 5000 |
| Manufacturer | Altera (now Intel PSG) | — |
| Macrocells | 192 | 192 |
| Propagation Delay (tPD) | 25 ns | 20 ns |
| Gehäuse | PLCC-68 (windowed ceramic, AJC) | PGA-132 (ceramic windowed, 'GC') |
| Pin-Anzahl | 68 | — |
| Montageart | Surface Mount | Through-hole (PGA socket) |
| Versorgungsspannung | 5 V (typical) | — |
| Logic Blocks | MAX 5000 LABs (Logic Array Blocks) | — |
| Programmable Pins | [DATA_NEEDED: number of user I/O pins] | — |
| Betriebstemperatur | [DATA_NEEDED: exact operating temperature range] | 0C to 70C (commercial) |
| Erasure Method | UV-erasable (windowed ceramic package) | — |
| Programming Technology | EPROM (non-volatile) | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status - ceramic PGA windowed parts are typically pre-RoHS] |
| Military Grade | Likely MIL-STD-883 processing per 'J' suffix in AJC marking (verify) | — |
| Device Type | — | EPLD (EEPLD, UV-erasable) |
| Usable Gates | — | 12,000 |
| Counter Frequency (fCNT) | — | 100 MHz (max) |
| Supply Voltage (VCC) | — | 5 V (4.75 V to 5.25 V) |
| Logic Array Blocks (LABs) | — | 8 |
| Dedicated I/O Pins | — | 96 |
| Programming Interface | — | IEEE 1149.1 JTAG |
| In-System Programmability | — | Yes (5 V ISP) |
| Security Bit | — | Yes (pattern read-back protected) |