EPM5192AJC-25 vs EPM5192AGC-20 对比

详细并排对比 EPM5192AJC-25 出自 Altera 和 EPM5192AGC-20 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM5192AJC-25 EPM5192AGC-20
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $8.20 $9.95
Family MAX 5000 EPLD MAX 5000
Manufacturer Altera (now Intel PSG) —
Macrocells 192 192
Propagation Delay (tPD) 25 ns 20 ns
封装 PLCC-68 (windowed ceramic, AJC) PGA-132 (ceramic windowed, 'GC')
引脚数量 68 —
安装类型 Surface Mount Through-hole (PGA socket)
电源电压 5 V (typical) —
Logic Blocks MAX 5000 LABs (Logic Array Blocks) —
Programmable Pins [DATA_NEEDED: number of user I/O pins] —
工作温度 [DATA_NEEDED: exact operating temperature range] 0C to 70C (commercial)
Erasure Method UV-erasable (windowed ceramic package) —
Programming Technology EPROM (non-volatile) —
RoHS 状态 [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS status - ceramic PGA windowed parts are typically pre-RoHS]
Military Grade Likely MIL-STD-883 processing per 'J' suffix in AJC marking (verify) —
Device Type — EPLD (EEPLD, UV-erasable)
Usable Gates — 12,000
Counter Frequency (fCNT) — 100 MHz (max)
Supply Voltage (VCC) — 5 V (4.75 V to 5.25 V)
Logic Array Blocks (LABs) — 8
Dedicated I/O Pins — 96
Programming Interface — IEEE 1149.1 JTAG
In-System Programmability — Yes (5 V ISP)
Security Bit — Yes (pattern read-back protected)

数据手册与资源

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