EPM7128SLC84-10 vs EPM7160SLC84-10 Vergleich
Detaillierter Direktvergleich von EPM7128SLC84-10 von Intel und EPM7160SLC84-10 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM7128SLC84-10 | EPM7160SLC84-10 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,75 | $35,77 |
| Family | MAX 7000S | MAX 7000S |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 128 | 160 |
| Logic Gates | 2500 | — |
| User I/Os | 68 | — |
| Total Package Pins | 84 | — |
| Gehäuse | PLCC-84 (J-lead) | 84-Pin PLCC (J-Lead) |
| Propagation Delay (tpd) | 10 ns | — |
| Maximum Operating Frequency | 125 MHz | 100 MHz |
| Internal Frequency | 250 MHz | — |
| Supply Voltage (VCCINT) | 5 V | — |
| MultiVolt I/O Support | 2.5 V / 3.3 V / 5 V | — |
| Program Memory Type | EEPROM (in-system programmable) | — |
| JTAG (IEEE 1149.1) | Yes | — |
| Betriebstemperatur | 0C to +70C (Commercial) | 0C to +70C (Commercial) |
| Montageart | Surface Mount (J-bend) | Surface Mount |
| MSL-Level | [DATA_NEEDED: MSL level] | — |
| RoHS-Status | Non-compliant (contains lead in PLCC) | [DATA_NEEDED: RoHS status] |
| Logic Array Blocks (LABs) | — | 4 |
| Maximum User I/O Pins | — | 64 |
| Usable Gates | — | 3,200 |
| Propagation Delay (tPD) | — | 10 ns |
| Supply Voltage (VCCINT/VCCIO) | — | 5.0 V |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG, 5.0 V) |
| Technology | — | EEPROM-based CMOS |
| JTAG Boundary Scan | — | Yes (IEEE Std. 1149.1 compliant) |