EPM7128SLC84-10 vs EPM7160SLC84-10 Comparación
Comparación detallada lado a lado de EPM7128SLC84-10 por Intel y EPM7160SLC84-10 por Altera. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | EPM7128SLC84-10 | EPM7160SLC84-10 |
|---|---|---|
| Marca | Intel | Altera |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $9,75 | $35,77 |
| Family | MAX 7000S | MAX 7000S |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 128 | 160 |
| Logic Gates | 2500 | — |
| User I/Os | 68 | — |
| Total Package Pins | 84 | — |
| Encapsulado | PLCC-84 (J-lead) | 84-Pin PLCC (J-Lead) |
| Propagation Delay (tpd) | 10 ns | — |
| Maximum Operating Frequency | 125 MHz | 100 MHz |
| Internal Frequency | 250 MHz | — |
| Supply Voltage (VCCINT) | 5 V | — |
| MultiVolt I/O Support | 2.5 V / 3.3 V / 5 V | — |
| Program Memory Type | EEPROM (in-system programmable) | — |
| JTAG (IEEE 1149.1) | Yes | — |
| Temperatura de funcionamiento | 0C to +70C (Commercial) | 0C to +70C (Commercial) |
| Tipo de montaje | Surface Mount (J-bend) | Surface Mount |
| Nivel MSL | [DATA_NEEDED: MSL level] | — |
| Estado RoHS | Non-compliant (contains lead in PLCC) | [DATA_NEEDED: RoHS status] |
| Logic Array Blocks (LABs) | — | 4 |
| Maximum User I/O Pins | — | 64 |
| Usable Gates | — | 3,200 |
| Propagation Delay (tPD) | — | 10 ns |
| Supply Voltage (VCCINT/VCCIO) | — | 5.0 V |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG, 5.0 V) |
| Technology | — | EEPROM-based CMOS |
| JTAG Boundary Scan | — | Yes (IEEE Std. 1149.1 compliant) |