EPM7128SLC84-10 vs EPM7160SLC84-10 对比
详细并排对比 EPM7128SLC84-10 出自 Intel 和 EPM7160SLC84-10 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM7128SLC84-10 | EPM7160SLC84-10 |
|---|---|---|
| 品牌 | Intel | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $9.75 | $35.77 |
| Family | MAX 7000S | MAX 7000S |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 128 | 160 |
| Logic Gates | 2500 | — |
| User I/Os | 68 | — |
| Total Package Pins | 84 | — |
| 封装 | PLCC-84 (J-lead) | 84-Pin PLCC (J-Lead) |
| Propagation Delay (tpd) | 10 ns | — |
| Maximum Operating Frequency | 125 MHz | 100 MHz |
| Internal Frequency | 250 MHz | — |
| Supply Voltage (VCCINT) | 5 V | — |
| MultiVolt I/O Support | 2.5 V / 3.3 V / 5 V | — |
| Program Memory Type | EEPROM (in-system programmable) | — |
| JTAG (IEEE 1149.1) | Yes | — |
| 工作温度 | 0C to +70C (Commercial) | 0C to +70C (Commercial) |
| 安装类型 | Surface Mount (J-bend) | Surface Mount |
| MSL 等级 | [DATA_NEEDED: MSL level] | — |
| RoHS 状态 | Non-compliant (contains lead in PLCC) | [DATA_NEEDED: RoHS status] |
| Logic Array Blocks (LABs) | — | 4 |
| Maximum User I/O Pins | — | 64 |
| Usable Gates | — | 3,200 |
| Propagation Delay (tPD) | — | 10 ns |
| Supply Voltage (VCCINT/VCCIO) | — | 5.0 V |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG, 5.0 V) |
| Technology | — | EEPROM-based CMOS |
| JTAG Boundary Scan | — | Yes (IEEE Std. 1149.1 compliant) |