EPM9320ARI208-10N vs EPM9320ARC208-10 Vergleich
Detaillierter Direktvergleich von EPM9320ARI208-10N von Altera und EPM9320ARC208-10 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPM9320ARI208-10N - MAX 9000 CPLD, 320 Macrocells, 208-RQFP | Altera
EPM9320ARI208-10N ObsoleteAltera
EPM9320ARC208-10 - MAX 9000 CPLD, 320 Macro, 10ns | Altera
EPM9320ARC208-10 ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EPM9320ARI208-10N | EPM9320ARC208-10 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $16,20 | $21,40 |
| Family | MAX 9000 | — |
| Product Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Usable Gates | 6,000 | 6,000 |
| Macrocells | 320 | 320 |
| Logic Array Blocks (LABs) | 20 | — |
| Maximum Operating Frequency | 144.9 MHz | — |
| Propagation Delay (tPD) | 10 ns (speed grade -10) | — |
| Versorgungsspannung | 4.5 V to 5.5 V | 5.0 V |
| Betriebstemperatur | -40 C to +85 C (industrial) | [DATA_NEEDED: operating temperature range] |
| Gehäuse | 208-pin RQFP (S-PQFP-G208) | RQFP-208 (Power Quad Flat Pack) |
| Montageart | Surface Mount | Surface Mount |
| Process Technology | CMOS EEPROM | — |
| Programmability | In-system (ISP) via IEEE 1149.1 JTAG | EEPROM, in-system programmable via JTAG |
| Global Dedicated Inputs | 16 | — |
| Architecture | Multiple Array MatriX (MAX) third-generation | — |
| RoHS-Status | unknown | [DATA_NEEDED: RoHS compliance status] |
| Device Family | — | MAX 9000 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Maximum Frequency | — | 144.9 MHz |
| Logic Blocks (LABs) | — | 16 |
| JTAG Support | — | IEEE Std. 1149.1 compliant |
| Speed/Power Optimization | — | Per-macrocell programmable, 50% power mode available |