EPM9320ARI208-10N vs EPM9320ARC208-10 Comparison
Detailed side-by-side comparison of EPM9320ARI208-10N by Altera and EPM9320ARC208-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM9320ARI208-10N - MAX 9000 CPLD, 320 Macrocells, 208-RQFP | Altera
EPM9320ARI208-10N Obsolete
Specification Comparison
| Parameter | EPM9320ARI208-10N | EPM9320ARC208-10 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $16.20 | $21.40 |
| Family | MAX 9000 | β |
| Product Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Usable Gates | 6,000 | 6,000 |
| Macrocells | 320 | 320 |
| Logic Array Blocks (LABs) | 20 | β |
| Maximum Operating Frequency | 144.9 MHz | β |
| Propagation Delay (tPD) | 10 ns (speed grade -10) | β |
| Supply Voltage | 4.5 V to 5.5 V | 5.0 V |
| Operating Temperature | -40 C to +85 C (industrial) | [DATA_NEEDED: operating temperature range] |
| Package | 208-pin RQFP (S-PQFP-G208) | RQFP-208 (Power Quad Flat Pack) |
| Mounting Type | Surface Mount | Surface Mount |
| Process Technology | CMOS EEPROM | β |
| Programmability | In-system (ISP) via IEEE 1149.1 JTAG | EEPROM, in-system programmable via JTAG |
| Global Dedicated Inputs | 16 | β |
| Architecture | Multiple Array MatriX (MAX) third-generation | β |
| RoHS Status | unknown | [DATA_NEEDED: RoHS compliance status] |
| Device Family | β | MAX 9000 |
| Pin-to-Pin Delay (tPD) | β | 10 ns |
| Maximum Frequency | β | 144.9 MHz |
| Logic Blocks (LABs) | β | 16 |
| JTAG Support | β | IEEE Std. 1149.1 compliant |
| Speed/Power Optimization | β | Per-macrocell programmable, 50% power mode available |