IPD30N10S3L34ATMA2 vs IPD30N06S2L13ATMA4 Vergleich
Detaillierter Direktvergleich von IPD30N10S3L34ATMA2 von Infineon und IPD30N06S2L13ATMA4 von Infineon. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Infineon
IPD30N06S2L13ATMA4 - 55V 30A N-Channel OptiMOS MOSFET | Infineon
IPD30N06S2L13ATMA4 ✓ AktivSpezifikationsvergleich
| Parameter | IPD30N10S3L34ATMA2 | IPD30N06S2L13ATMA4 |
|---|---|---|
| Marke | Infineon | Infineon |
| Kategorie | MOSFETs | MOSFETs |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $0,92 | $0,48 |
| FET Type | N-Channel | — |
| Drain-Source Voltage (V_DS) | 100 V | — |
| Continuous Drain Current (I_D, Tc) | 30 A | — |
| Pulsed Drain Current (I_DM) | 180 A | — |
| Power Dissipation (P_D, Tc) | 57 W | — |
| R_DS(on) max at V_GS=10V | 31 mOhm (typ) | — |
| Gate Threshold Voltage V_GS(th) max | 2.4 V | — |
| Total Gate Charge (Qg) max | 31 nC | — |
| Betriebs-Sperrschichttemperatur | -55 C to +175 C | — |
| Package / Supplier Device Package | PG-TO252-3-11 (DPAK) | — |
| Montageart | Surface Mount | Surface Mount |
| Pin / Tab Count | 3 (2 + Tab) | — |
| Technology | OptiMOS-T (trench) | Planar (OptiMOS) |
| Automotive Qualification | AEC-Q101 | AEC-Q101 qualified |
| MSL-Level | [DATA_NEEDED: MSL level] | — |
| RoHS-Status | Compliant | — |
| Manufacturer | — | Infineon Technologies |
| Part Family | — | OptiMOS |
| Channel Type | — | N-Channel |
| Mode | — | Enhancement |
| Drain-Source Voltage (Vds) | — | 55 V |
| Continuous Drain Current (Id) | — | 30 A (Tc) |
| Power Dissipation (Pd) | — | 136 W (Tc) |
| Gehäuse | — | PG-TO252-3-11 (DPAK) |
| Betriebstemperatur | — | -55 °C to +175 °C (Tj) |
| MSL (Moisture Sensitivity Level) | — | MSL1 (per JEDEC J-STD-020, up to 260 °C peak reflow) |
| Lead-Free / RoHS | — | Yes (Green Package) |
| Avalanche Tested | — | 100 % production-tested |
| On-State Resistance (Rds(on)) | — | [DATA_NEEDED: exact typ/max Rds(on) at Vgs=10V and at Vgs=4.5V] |
| Gate-Source Threshold (Vgs(th)) | — | Logic-level (typ [DATA_NEEDED: Vth typ/min/max]) |
| Total Gate Charge (Qg) | — | [DATA_NEEDED: Qg @ Vgs=10V, Id=30A] |
| Input Capacitance (Ciss) | — | [DATA_NEEDED: Ciss typ at Vds=25V] |
| Diode Reverse Recovery (trr) | — | [DATA_NEEDED: trr typ] |
| Pin-Anzahl | — | 3 (Drain tab + Gate + Source) |
| Tape and Reel Packaging | — | Yes (T&R per IEC 60286-3) |