K3K8K80BM-JGCT vs K3K9K90BM-MGCP Vergleich
Detaillierter Direktvergleich von K3K8K80BM-JGCT von Samsung Electronics und K3K9K90BM-MGCP von Samsung Electronics. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Samsung Electronics
K3K8K80BM-JGCT - Samsung LPDDR DRAM Memory IC | Samsung Electronics
K3K8K80BM-JGCT ✓ AktivSpezifikationsvergleich
| Parameter | K3K8K80BM-JGCT | K3K9K90BM-MGCP |
|---|---|---|
| Marke | Samsung Electronics | Samsung Electronics |
| Kategorie | Memory ICs | Memory ICs |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $3,10 | $47,15 |
| Manufacturer | Samsung Electronics | — |
| Product Family | K3K mobile DRAM (LPDDR) component series | — |
| Speichertyp | Low Power DRAM (LPDDR) component | LPDDR5 SDRAM (CMOS) |
| Density | [DATA_NEEDED: die density in Gb] | — |
| Speicherorganisation | [DATA_NEEDED: x8/x16 organization] | [DATA_NEEDED: density and organization] |
| Schnittstelle | [DATA_NEEDED: LPDDR4X or LPDDR5] | — |
| Maximum Data Rate | [DATA_NEEDED: Mbps] | — |
| Supply Voltage (VDD) | [DATA_NEEDED: core supply voltage] | [DATA_NEEDED: VDD voltage] |
| Supply Voltage (VDDQ) | [DATA_NEEDED: I/O supply voltage] | — |
| Package Type | FBGA (Ball Grid Array) | — |
| Ball Count | [DATA_NEEDED: package ball count] | [DATA_NEEDED: ball count] |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| Speed Grade Suffix | J (per Samsung speed-grade coding) | — |
| Packing Suffix | CT (per Samsung packing-code convention) | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| MSL-Level | [DATA_NEEDED: moisture sensitivity level] | — |
| Pin Speed | — | Up to 6400 Mbps (family maximum per Samsung LPDDR5 page) |
| Interface Width | — | x32 (family standard for K3K/K3L BM packages) |
| Gehäuse | — | PBGA (Plastic Ball Grid Array) |
| Refresh | — | Self-refresh with per-bank refresh support (LPDDR5 standard) |
| Power Saving vs LPDDR4X | — | Approximately 20% (Samsung published figure) |
| Max Bandwidth | — | Up to 51.2 GB/s (family maximum per Samsung LPDDR5 page) |
| Moisture Sensitivity Level | — | [DATA_NEEDED: MSL level] |
| Clocking | — | WCK (word clock) architecture |
| Standards | — | JEDEC LPDDR5 |