MCIMX31CVMN4CR2 vs MCIMX31LCVMN4C Vergleich
Detaillierter Direktvergleich von MCIMX31CVMN4CR2 von NXP Semiconductors und MCIMX31LCVMN4C von NXP Semiconductors. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
NXP Semiconductors
MCIMX31CVMN4CR2 - i.MX31 ARM1136 400MHz MPU, 473-LFBGA | NXP
MCIMX31CVMN4CR2 NrndNXP Semiconductors
MCIMX31LCVMN4C - i.MX31L ARM1136 400MHz MPU, MAPBGA-457 | NXP
MCIMX31LCVMN4C ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | MCIMX31CVMN4CR2 | MCIMX31LCVMN4C |
|---|---|---|
| Marke | NXP Semiconductors | NXP Semiconductors |
| Kategorie | Microcontrollers | Microcontrollers |
| Lebenszyklusstatus | NRND | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $17,10 | $10,50 |
| Core Architecture | ARM1136JF-S | ARM1136JF-S |
| Core Count | 1 | 1 |
| Datenbusbreite | 32-bit | 16-bit |
| Maximum Core Frequency | 400 MHz | — |
| Betriebsversorgungsspannung | 1.8 V to 2.0 V core, 1.8 V to 3.3 V I/O | — |
| Gehäuse / Bauform | 473-LFBGA (MAPBGA-473) | — |
| Package Dimensions | 19 mm x 19 mm | 14 x 14 mm |
| Montageart | Surface Mount | Surface Mount |
| RAM Size (on-chip SRAM) | 16K x 8 | — |
| Packaging | Tape & Reel (TR) | — |
| Oscillator Type | External | — |
| On-chip Multimedia | MPEG-4/H.263 encoder/decoder, Image Processing Unit (IPU) | — |
| Peripheral Interfaces | USB, Ethernet MAC, UART, I2C, SPI, MMC/SD | — |
| Betriebstemperaturbereich | -40 C to +85 C (automotive/industrial grade) | -40C to +85C |
| Family | i.MX31 multimedia applications processors | i.MX31L |
| RoHS-Status | Compliant | Compliant |
| Lead-Free / Halogen-Free | [DATA_NEEDED: lead-free and halogen-free status] | — |
| Maximale Taktfrequenz | — | 400 MHz |
| Package Type | — | MAPBGA-457 |
| Ball Pitch | — | 0.5 mm |
| Pin-Anzahl | — | 457 |
| Variant Suffix | — | N4C (industrial/auto temp grade) |
| Process Node | — | [DATA_NEEDED: process node] |
| L1 Cache | — | [DATA_NEEDED: L1 instruction/data cache] |
| L2 Cache | — | [DATA_NEEDED: L2 cache] |
| Integrated LCD Controller | — | Yes |
| USB Interface | — | USB 2.0 with on-chip PHY |
| Image Processing Unit (IPU) | — | Yes |
| AEC-Q100 Grade | — | Grade 3 |